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부품번호 MC34167 기능
기능 (MC33167 / MC34167) Step-Up/Down/Inverting Switching Regulators
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MC34167 데이터시트, 핀배열, 회로
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MC34167, MC33167
5.0 A, Step−Up/Down/
Inverting Switching
Regulators
The MC34167, MC33167 series are high performance fixed
frequency power switching regulators that contain the primary
functions required for dc−to−dc converters. This series was
specifically designed to be incorporated in step−down and
voltage−inverting configurations with a minimum number of external
components and can also be used cost effectively in step−up
applications.
These devices consist of an internal temperature compensated
reference, fixed frequency oscillator with on−chip timing components,
latching pulse width modulator for single pulse metering, high gain
error amplifier, and a high current output switch.
Protective features consist of cycle−by−cycle current limiting,
undervoltage lockout, and thermal shutdown. Also included is a low
power standby mode that reduces power supply current to 36 mA.
Features
Output Switch Current in Excess of 5.0 A
Fixed Frequency Oscillator (72 kHz) with On−Chip Timing
Provides 5.05 V Output without External Resistor Divider
Precision 2% Reference
0% to 95% Output Duty Cycle
Cycle−by−Cycle Current Limiting
Undervoltage Lockout with Hysteresis
Internal Thermal Shutdown
Operation from 7.5 V to 40 V
Standby Mode Reduces Power Supply Current to 36 mA
Economical 5−Lead TO−220 Package with Two Optional Leadforms
Also Available in Surface Mount D2PAK Package
Moisture Sensitivity Level (MSL) Equals 1
Pb−Free Packages are Available
ILIMIT
Vin
4
Oscillator
PWM
Thermal
S
Q
R
UVLO
Reference
EA
2
1
35
This device contains 143 active transistors.
Figure 1. Simplified Block Diagram
(Step Down Application)
L
VO
5.05 V/
5.0 A
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MARKING
DIAGRAMS
1
5
TO−220
TH SUFFIX
CASE 314A
MC
3x167T
AWLYWWG
Heatsink surface connected to Pin 3
1
5
TO−220
TV SUFFIX
CASE 314B
MC
3x167T
AWLYWWG
TO−220
1
T SUFFIX
CASE 314D
5
Pin 1. Voltage Feedback Input
2. Switch Output
3. Ground
4. Input Voltage/VCC
5. Compensation/Standby
MC
3x167T
AWLYWWG
D2PAK
MC
1
D2T SUFFIX
CASE 936A
3x167T
AWLYWWG
5
Heatsink surface (shown as
terminal 6 in case outline
1
drawing) is connected to Pin 3
5
x = 3 or 4
A = Assembly Location
WL = Wafer Lot
Y = Year
WW = Work Week
G = Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 17 of this data sheet.
© Semiconductor Components Industries, LLC, 2005
November, 2005 − Rev. 7
1
Publication Order Number:
MC34167/D




MC34167 pdf, 반도체, 판매, 대치품
MC34167, MC33167
5.25
VCC = 12 V
5.17
5.09
5.01
4.93
VFB(th) Max = 5.15 V
VFB(th) Typ = 5.05 V
VFB(th) Min = 4.95 V
100
80
60
40
20
VCC = 12 V
VFB = VFB(th)
4.85
− 55 − 25
0 25 50 75 100
TA, AMBIENT TEMPERATURE (°C)
125
Figure 2. Voltage Feedback Input Threshold
versus Temperature
0
− 55 − 25
0 25 50 75 100
TA, AMBIENT TEMPERATURE (°C)
125
Figure 3. Voltage Feedback Input Bias
Current versus Temperature
100 0
VCC = 12 V
80
Gain
VComp = 3.25 V
RL = 100 k
TA = +25°C
30
60 60
40 90
Phase
20 120
0 150
− 20
10
180
100 1.0 k 10 k 100 k 1.0 M 10 M
f, FREQUENCY (Hz)
Figure 4. Error Amp Open Loop Gain and
Phase versus Frequency
2.0
1.6
1.2
0.8
VCC = 12 V
VFB = 5.5 V
0.4 TA = +25°C
0
0 0.4 0.8 1.2 1.6 2.0
ISink, OUTPUT SINK CURRENT (mA)
Figure 5. Error Amp Output Saturation
versus Sink Current
4.0
VCC = 12 V
0
− 4.0
− 8.0
− 12
− 55
− 25 0 25 50 75 100
TA, AMBIENT TEMPERATURE (°C)
Figure 6. Oscillator Frequency Change
versus Temperature
125
100
80
VCC = 12 V
TA = +25°C
60
40
20
0
1.5 2.0 2.5 3.0 3.5 4.0
VComp, COMPENSATION VOLTAGE (V)
Figure 7. Switch Output Duty Cycle
versus Compensation Voltage
4.5
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MC34167 전자부품, 판매, 대치품
MC34167, MC33167
INTRODUCTION
The MC34167, MC33167 series are monolithic power
switching regulators that are optimized for dc−to−dc
converter applications. These devices operate as fixed
frequency, voltage mode regulators containing all the active
functions required to directly implement step−down and
voltage−inverting converters with a minimum number of
external components. They can also be used cost effectively
in step−up converter applications. Potential markets include
automotive, computer, industrial, and cost sensitive
consumer products. A description of each section of the
device is given below with the representative block diagram
shown in Figure 14.
Oscillator
The oscillator frequency is internally programmed to
72 kHz by capacitor CT and a trimmed current source. The
charge to discharge ratio is controlled to yield a 95%
maximum duty cycle at the Switch Output. During the
discharge of CT, the oscillator generates an internal blanking
pulse that holds the inverting input of the AND gate high,
disabling the output switch transistor. The nominal
oscillator peak and valley thresholds are 4.1 V and 2.3 V
respectively.
Pulse Width Modulator
The Pulse Width Modulator consists of a comparator with
the oscillator ramp voltage applied to the noninverting input,
while the error amplifier output is applied into the inverting
input. Output switch conduction is initiated when CT is
discharged to the oscillator valley voltage. As CT charges to
a voltage that exceeds the error amplifier output, the latch
resets, terminating output transistor conduction for the
duration of the oscillator ramp−up period. This PWM/Latch
combination prevents multiple output pulses during a given
oscillator clock cycle. Figures 7 and 15 illustrate the switch
output duty cycle versus the compensation voltage.
Current Sense
The MC34167 series utilizes cycle−by−cycle current
limiting as a means of protecting the output switch transistor
from overstress. Each on cycle is treated as a separate
situation. Current limiting is implemented by monitoring the
output switch transistor current buildup during conduction,
and upon sensing an overcurrent condition, immediately
turning off the switch for the duration of the oscillator
ramp−up period.
The collector current is converted to a voltage by an
internal trimmed resistor and compared against a reference
by the Current Sense comparator. When the current limit
threshold is reached, the comparator resets the PWM latch.
The current limit threshold is typically set at 6.5 A.
Figure 10 illustrates switch output current limit threshold
versus temperature.
Error Amplifier and Reference
A high gain Error Amplifier is provided with access to the
inverting input and output. This amplifier features a typical
dc voltage gain of 80 dB, and a unity gain bandwidth of
600 kHz with 70 degrees of phase margin (Figure 4). The
noninverting input is biased to the internal 5.05 V reference
and is not pinned out. The reference has an accuracy of
± 2.0% at room temperature. To provide 5.0 V at the load,
the reference is programmed 50 mV above 5.0 V to
compensate for a 1.0% voltage drop in the cable and
connector from the converter output. If the converter design
requires an output voltage greater than 5.05 V, resistor R1
must be added to form a divider network at the feedback
input as shown in Figures 14 and 19. The equation for
determining the output voltage with the divider network is:
ǒ ǓVout + 5.05
R2
R1
)
1
External loop compensation is required for converter
stability. A simple low−pass filter is formed by connecting
a resistor (R2) from the regulated output to the inverting
input, and a series resistor−capacitor (RF, CF) between Pins
1 and 5. The compensation network component values
shown in each of the applications circuits were selected to
provide stability over the tested operating conditions. The
step−down converter (Figure 19) is the easiest to
compensate for stability. The step−up (Figure 21) and
voltage−inverting (Figure 23) configurations operate as
continuous conduction flyback converters, and are more
difficult to compensate. The simplest way to optimize the
compensation network is to observe the response of the
output voltage to a step load change, while adjusting RF and
CF for critical damping. The final circuit should be verified
for stability under four boundary conditions. These
conditions are minimum and maximum input voltages, with
minimum and maximum loads.
By clamping the voltage on the error amplifier output
(Pin 5) to less than 150 mV, the internal circuitry will be
placed into a low power standby mode, reducing the
power supply current to 36 mA with a 12 V supply voltage.
Figure 11 illustrates the standby supply current versus
supply voltage.
The Error Amplifier output has a 100 mA current source
pull−up that can be used to implement soft−start. Figure 18
shows the current source charging capacitor CSS through a
series diode. The diode disconnects CSS from the feedback
loop when the 1.0 M resistor charges it above the operating
range of Pin 5.
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