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MCR8DSM 데이터시트 PDF




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부품번호 MCR8DSM 기능
기능 Sensitive Gate Silicon Controlled Rectifiers Reverse Blocking Thyristors
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MCR8DSM 데이터시트, 핀배열, 회로
www.DataSheet4U.com
MCR8DSM, MCR8DSN
Preferred Device
Sensitive Gate
Silicon Controlled Rectifiers
Reverse Blocking Thyristors
Designed for high volume, low cost, industrial and consumer
applications such as motor control; process control; temperature, light
and speed control.
Features
Small Size
Passivated Die for Reliability and Uniformity
Low Level Triggering and Holding Characteristics
Available in Two Package Styles
Surface Mount Lead Form − Case 369C
Miniature Plastic Package − Straight Leads − Case 369
Epoxy Meets UL 94 V−0 @ 0.125 in
ESD Ratings: Human Body Model, 3B u 8000 V
Machine Model, C u 400 V
Pb−Free Packages are Available
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol Value
Unit
Peak Repetitive Off−State Voltage (Note 1)
(TJ = −40 to 110°C, Sine Wave, 50 to 60 Hz,
Gate Open)
MCR8DSM
MCR8DSN
VDRM,
VRRM
600
800
V
On−State RMS Current
(180° Conduction Angles; TC = 90°C)
IT(RMS)
8.0
A
Average On−State Current
(180° Conduction Angles; TC = 90°C)
Peak Non-Repetitive Surge Current
(1/2 Cycle, Sine Wave 60 Hz, TJ = 110°C)
Circuit Fusing Consideration (t = 8.3 msec)
IT(AV)
ITSM
I2t
5.1 A
90 A
34 A2sec
Forward Peak Gate Power
(Pulse Width 1.0 msec, TC = 90°C)
PGM 5.0 W
Forward Average Gate Power
(t = 8.3 msec, TC = 90°C)
PG(AV)
0.5
W
Forward Peak Gate Current
(Pulse Width 1.0 msec, TC = 90°C)
IGM 2.0 A
Operating Junction Temperature Range
TJ −40 to 110 °C
Storage Temperature Range
Tstg −40 to 150 °C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. VDRM and VRRM for all types can be applied on a continuous basis. Ratings
apply for negative gate voltage; positive gate voltage shall not be applied
concurrent with negative potential on the anode. Blocking voltages shall not
be tested with a constant current source such that the voltage ratings of the
device are exceeded.
http://onsemi.com
SCRs
8 AMPERES RMS
600 − 800 VOLTS
G
AK
MARKING
DIAGRAM
4
DPAK
CASE 369C
1 STYLE 4
YWW
CR
8DSxG
Y=
WW =
CR8DSx =
G=
Year
Work Week
Device Code
x= M or N
Pb−Free Package
PIN ASSIGNMENT
1 Cathode
2 Anode
3 Gate
4 Anode
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Preferred devices are recommended choices for future use
and best overall value.
© Semiconductor Components Industries, LLC, 2005
November, 2005 − Rev. 4
1
Publication Order Number:
MCR8DSM/D




MCR8DSM pdf, 반도체, 판매, 대치품
MCR8DSM, MCR8DSN
100
TYPICAL @ TJ = 25°C
10
MAXIMUM @ TJ = 110°C
1.0
MAXIMUM @ TJ = 25°C
1.0
0.1
ZqJC(t) = RqJC(t)Sr(t)
0.1
0
1.0 2.0 3.0 4.0
VT, INSTANTANEOUS ON−STATE VOLTAGE (VOLTS)
5.0
Figure 3. On−State Characteristics
0.01
0.1
1.0
10 100
t, TIME (ms)
1000 10 K
Figure 4. Transient Thermal Response
1000 1.0
RGK = 1.0 KW
100
GATE OPEN
10
1.0
−40 −25
−10 5.0 20 35 50 65 80
TJ, JUNCTION TEMPERATURE (°C)
95 110
Figure 5. Typical Gate Trigger Current versus
Junction Temperature
0.1
−40 −25 −10 5.0 20 35 50 65 80 95 110
TJ, JUNCTION TEMPERATURE (°C)
Figure 6. Typical Gate Trigger Voltage versus
Junction Temperature
10 10
RGK = 1.0 KW
RGK = 1.0 KW
1.0 1.0
0.1
−40 −25 −10 5.0 20 35 50 65 80 95 110
TJ, JUNCTION TEMPERATURE (°C)
Figure 7. Typical Holding Current versus
Junction Temperature
0.1
−40 −25 −10 5.0 20 35 50 65 80 95 110
TJ, JUNCTION TEMPERATURE (°C)
Figure 8. Typical Latching Current versus
Junction Temperature
http://onsemi.com
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