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PDF NJ88C33 Data sheet ( Hoja de datos )

Número de pieza NJ88C33
Descripción Frequency Synthesiser
Fabricantes Zarlink Semiconductor 
Logotipo Zarlink Semiconductor Logotipo



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NJ88C33
Frequency Synthesiser (I2C BUS Programmable)
Advance Information
DS2429 - 3.2 September 1994
The NJ88C33 is a synthesiser circuit fabricated on Zarlink
Semiconductor's 1.4 micron CMOS process, assuring very
high performance. It is I2C compatible and can also be
programmed at up to 5MHz. It contains a 16-bit R counter, a
12-bit N counter and a 7-bit A counter.
A digital phase comparator gives improved loop stability
with current source outputs to reduce loop components. A
voltage doubler is provided for the loop driver to improve
control voltage range to the VCO when operating at low supply
voltages.
DP14
FEATURES
s Easy to Use
s Low Power Consumption (15mW)
s Single Supply 2.5V to 5.5V
s Digital Phase Comparator with Current Source
Outputs
s Serial (I2C Compatible) Programming, 5MHz max
s Channel Loading in 8µs
s 150MHz Input Frequency Without Prescaler at 4.5V
(52MHz at 2.7V)
s Standby Modes
s Use of Two-Modulus Prescaler is Possible
APPLICATIONS
s Cordless Telephones (CT2, DECT)
s Cellular Telephones (GSM, PCN, ETACS)
s Hand Held Marine Radios
s Sonarbuoys
s Video Clock generators
MP14
Fig.1 Pin connections (not to scale) - top views
ABSOLUTE MAXIMUM RATINGS
Supply voltage, VDD
Input voltage, VIM1
Output voltage on pin 13, VIM2
Storage temperature, Tstg
-0.3V to 7V
-0.3 to VDD +0.3V
-VDD to 0V
-55°C to +125°C
ORDERING INFORMATION
NJ88C33 MA DP (Industrial - Plastic DIL package)
NJ88C33 MA MP (Industrial - Miniature Plastic DIL package)
Fig.2 Simplified block diagram of NJ88C33

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NJ88C33 pdf
NJ88C33
VOLTAGE DOUBLER
Characteristic
Output Pin C
Output voltage
Fig. 4 Typical output signal PD, high current mode
VDD 3V
Value
Symbol
Min. Typ.
Max.
Unit
Conditions
VC
VC
-V
DD
-VDD
-VDD + 0.8V V
-VDD + 1.5V V
fVD = 2MHz, IOC = 0µA, VDD = 3V
fVD = 2MHz, IOC = 100µA, VDD = 3V
Current Consumption
TIMING INFORMATION
Characteristic
Input Signal RI
Input frequency
Input frequency
Rise time
Fall time
Slew rate
Input Signal FI
Input frequency
Input frequency
Rise time
Fall time
Slew rate
Input Signal FI
Input frequency
Input frequency
Rise time
Fall time
Slew rate
Output Signal PORT
Rise time
Fall time
Output Signal FVN
Fall time
Output Signal MOD
Rise time
Fall time
Delay time (LH)
Delay time (HL)
ID 100 µA fVD = 2MHz, IOC = 0µA, VDD = 3V
Symbol
Value
Min. Typ. Max.
Unit
Conditions
fmax 0
fmax 0
tR
tF
3
f
max
0
fmax 0
tR
tF
3
fmax
fmax 0
tR 0
tF
3
52 MHz
10 MHz VDD = 2.7V
1.5 µs
1.5 µs
V/µs
Dual modulus
52 MHz
20 MHz VDD = 2.7V
1.5 µs
1.5 µs
V/µs
Single modulus
150 MHz
52 MHz VDD = 2.7V
1.5 µs
1.5 µs
V/µs
tR 1 µs CL = 30pF
tF 1 µs CL = 30pF
tF 20 ns CL = 30pF
t
R
10 ns CL = 30pF
tF 10 ns CL = 30pF
tDLH 15 ns CL = 30pF Measured from +Ve edge of FI
tDHL 15 ns CL = 30pF Measured from +Ve edge of FI
5

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