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Número de pieza | MC74VHC540 | |
Descripción | Octal Bus Buffer Inverting | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
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Octal Bus Buffer
Inverting
The MC74VHC540 is an advanced high speed CMOS inverting
octal bus buffer fabricated with silicon gate CMOS technology. It
achieves high speed operation similar to equivalent Bipolar Schottky
TTL while maintaining CMOS low power dissipation.
The MC74VHC540 features inputs and outputs on opposite sides of
the package and two AND--ed active- low output enables. When either
OE1 or OE2 are high, the terminal outputs are in the high impedance
state.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7V, allowing the interface of 5V systems
to 3V systems.
• High Speed: tPD = 3.7ns (Typ) at VCC = 5V
• Low Power Dissipation: ICC = 4μA (Max) at TA = 25°C
• High Noise Immunity: VNIH = VNIL = 28% VCC
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Designed for 2V to 5.5V Operating Range
• Low Noise: VOLP = 1.2V (Max)
• Pin and Function Compatible with Other Standard Logic Families
www.DataSheet4U.com
• Latchup Performance Exceeds 300mA
• ESD Performance: HBM > 2000V; Machine Model > 200V
• Chip Complexity: 124 FETs or 31 Equivalent Gates
• These devices are available in Pb--free package(s). Specifications herein
apply to both standard and Pb--free devices. Please see our website at
www.onsemi.com for specific Pb--free orderable part numbers, or
contact your local ON Semiconductor sales office or representative.
MC74VHC540
DW SUFFIX
20--LEAD SOIC WIDE PACKAGE
CASE 751D--05
DT SUFFIX
20--LEAD TSSOP PACKAGE
CASE 948E--02
M SUFFIX
20--LEAD SOIC EIAJ PACKAGE
CASE 967--01
ORDERING INFORMATION
MC74VHCXXXDW SOIC WIDE
MC74VHCXXXDT
TSSOP
MC74VHCXXXM
SOIC EIAJ
PIN ASSIGNMENT
OE1 1
A1 2
A2 3
A3 4
A4 5
A5 6
A6 7
A7 8
A8 9
GND 10
20 VCC
19 OE2
18 Y1
17 Y2
16 Y3
15 Y4
14 Y5
13 Y6
12 Y7
11 Y8
FUNCTION TABLE
Inputs
OE1 OE2
A
LLL
L LH
HXX
XHX
Output Y
H
L
Z
Z
© Semiconductor Components Industries, LLC, 2006
March, 2006 -- Rev. 3
1
Publication Order Number:
MC74VHC540/D
1 page A 50%
tPHL
Y 50% VCC
Figure 1.
SWITCHING WAVEFORMS
VCC OE1 or OE2
GND
tPLH
Y
Y
50%
tPZL tPLZ
50% VCC
tPZH tPHZ
50% VCC
Figure 2.
VCC
50%
GND
HIGH
IMPEDANCE
VOL +0.3V
VOH --0.3V
HIGH
IMPEDANCE
DEVICE
UNDER
TEST
TEST
POINT
OUTPUT
CL*
TEST CIRCUITS
DEVICE
UNDER
TEST
TEST
POINT
OUTPUT
1kΩ
CL*
CONNECT TO VCC WHEN
TESTING tPLZ AND tPZL.
CONNECT TO GND WHEN
TESTING tPHZ AND tPZH.
*Includes all probe and jig capacitance
Figure 3.
*Includes all probe and jig capacitance
Figure 4.
INPUT EQUIVALENT CIRCUIT
INPUT
http://onsemi.com
5
5 Page |
Páginas | Total 8 Páginas | |
PDF Descargar | [ Datasheet MC74VHC540.PDF ] |
Número de pieza | Descripción | Fabricantes |
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