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PDF 4066 Data sheet ( Hoja de datos )

Número de pieza 4066
Descripción QUAD BILATERAL SWITCH
Fabricantes Unisonic Technologies 
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No Preview Available ! 4066 Hoja de datos, Descripción, Manual

UNISONIC TECHNOLOGIES CO., LTD
4066
QUAD BILATERAL SWITCH
CMOS IC
DESCRIPTION
The UTC 4066 is a quad bilateral switch intended for the
transmission or multiplexing of analog or digital signals.
FEATURES
* Wide supply voltage range: 3V ~ 15V.
* High noise immunity : 0.45VDD (typ.)
* Wide range of digital and ± 7.5VPEAK analog switching
* “ON” resistance for 15V operation : 80
* Matched ”ON” resistance : RON=5(typ.)
over 15V signal input
* “ON” resistance flat over peak-to-peak signal range
* High “ON” / “OFF” : 65 dB (typ.)
output voltage ratio @ fIS=10kHz, RL=10k
* High degree linearity: 0.1% distortion (typ.).
@ fIS=1kHz, VIS=5Vp-p.
* VDD-VSS=10V, RL=10k
* Extremely low ”OFF” : 0.1nA (typ.)
* switch leakage @VDD-VSS=10V, Ta=25
* Extremely high control input impedance : 1012(typ.)www.DataSheet4U.com
* Low crosstalk : -50dB (typ.)
* between switches @ fIS=0.9MHz, RL=1k
* Frequency response, switch ”ON” : 40MHz (typ.)
ORDERING INFORMATION
Ordering Number
Normal
Lead Free Plating
4066-D14-T
4066L-D14-T
4066-S14-R
4066L-S14-R
4066-S14-T
4066L-S14-T
4066-P14-R
4066L-P14-R
4066-P14-T
4066L-P14-T
Package
DIP-14
SOP-14
SOP-14
TSSOP-14
TSSOP-14
SOP-14
DIP-14
TSSOP-14
*Pb-free plating product number: 4066L
Packing
Tube
Tape Reel
Tube
Tape Reel
Tube
4066L-D14-T
(1)Packing Type
(2)Package Type
(3)Lead Plating
(1) R: Tape Reel, T: Tube
(2) D14: DIP-14, S14: SOP-14, P14: TSSOP-14
(3) L: Lead Free Plating, Blank: Pb/Sn
www.unisonic.com.tw
Copyright © 2005 Unisonic Technologies Co., Ltd
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4066 pdf
4066
CMOS IC
SPECIAL CONSIDERATIONS
In applications where separate power sources are used to drive VDD and the signal input, the VDD current capability
should exceed VDD/RL (RL=effective external load of the UTC 4066 bilateral switches).This provision avoids any
permanent current flow or clamp action of the VDD supply when power is applied or removed from UTC 4066.
In certain applications, the external load-resistor current may include both VDD and Signal-line components. To
avoid drawing VDD current when switch current flows into terminals 1,4,8 or 11,the voltage drop across the
bidirectional swith must not exceed 0.6V at Ta 25 , or 0.4V at Ta >25 (calculated from RON values shown).
NO VDD current will flow through RL if the switch current flows into terminals2, 3, 9 or 10.
AC TEST CIRCUITS AND SWITCHING TIME WAVEFORMS
VC=VDD
VIS
VDD
CONTROL
VDD
IN/OUT 1 OF 4 OOTUUT/I/NIN
SWITCHES
Vss
CL
50pF
VOS
RL
200 K
VDD
VIS
0V
VDD
VOS
0V
tf
90%
50%
10%
t PLN
50%
tf
t PNL
VC
VIS=VDD
FIGURE 1. t PHL, t PLH Propagation Delay Time Signal Input to Signal Output
VDD
t PZH
t PHZ
CONTROL VDD
1 OF 4
IN/OUT OUT/IN
SWITCHES
CL
VOS
RL
VDD
0V
VOH
50%
tPZH
VDD 50%
0V VDD
VOH
t PHZ
90%
Vss 50pF 1K
0V 10%
0V
VC
VIS=0V
FIGURE 2. tPZH, t PHZ Propagation Delay Time Control to Signal Output
VDD
CONTROL VDD
1OF 4
IN/OUT OUT/IN
SWITCHES
Vss
VDD
RL
1K
VOS
CL
50pF
VDD
t PZL
VDD
50%
0V tPZL 0V
VDD
90%
VDD
VOL
VOL
FIGURE 3 . t PZL, t PLZ Propagation Delay Time Control to Signal Output
t PLZ
50%
t PLZ
10%
VC 5V
CONTROL VDD
1OF 4
VIS IN/OUT OUT/IN
VOS
SWITCHES
Vss RL
-5V
Vc=VDD for distortion and frequency response tests
Vc= Vss for feedthrough test
2.5V
VIS = 0V
-2.5V
1/f
FIGURE 4. Sine Wave Distortion, Frequency Response and Feedthrough
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
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