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PDF MC74VHCT02A Data sheet ( Hoja de datos )
| Número de pieza | MC74VHCT02A | |
| Descripción | Quad 2-Input NOR Gate | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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ON Semiconductort
Quad 2−Input NOR Gate
The MC74VHCT02A is an advanced high speed CMOS 2−input
NOR gate fabricated with silicon gate CMOS technology. It achieves
high speed operation similar to equivalent Bipolar Schottky TTL
while maintaining CMOS low power dissipation.
The VHCT inputs are compatible with TTL levels. This device can
be used as a level converter for interfacing 3.3V to 5.0V, because it has
full 5V CMOS level output swings.
The VHCT02A input structures provide protection when voltages
between 0V and 5.5V are applied, regardless of the supply voltage.
The output structures also provide protection when VCC = 0V. These
input and output structures help prevent device destruction caused by
supply voltage − input/output voltage mismatch, battery backup, hot
insertion, etc.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7V, allowing the interface of 5V systems
to 3V systems.
• High Speed: tPD = 3.6ns (Typ) at VCC = 5 V
• Low Power Dissipation: ICC = 2μA (Max) at TA = 25°C
• TTL−Compatible Inputs: VIL = 0.8V; VIH = 2.0V
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Designed for 2V to 5.5V Operating Range
www.DataSheet4U.com
• Low Noise: VOLP = 0.8 V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300mA
• ESD Performance: HBM > 2000V; Machine Model > 200V
• Chip Complexity: 40 FETs or 10 Equivalent Gates
w These devices are available in Pb−free package(s). Specifications herein
apply to both standard and Pb−free devices. Please see our website at
www.onsemi.com for specific Pb−free orderable part numbers, or
contact your local ON Semiconductor sales office or representative.
MC74VHCT02A
D SUFFIX
14−LEAD SOIC PACKAGE
CASE 751A−03
DT SUFFIX
14−LEAD TSSOP PACKAGE
CASE 948G−01
M SUFFIX
14−LEAD SOIC EIAJ PACKAGE
CASE 965−01
ORDERING INFORMATION
MC74VHCTXXAD
MC74VHCTXXADT
MC74VHCTXXAM
SOIC
TSSOP
SOIC EIAJ
© Semiconductor Components Industries, LLC, 2006
March, 2006 − Rev. 4
1
Publication Order Number:
MC74VHCT02A/D
1 page  
OUTLINE DIMENSIONS
D SUFFIX
SOIC−14
CASE 751A−03
ISSUE F
−A−
14
1
G
8
−B−
7
P 7 PL
0.25 (0.010) M B M
C R X 45 _
−T−
SEATING
PLANE
D 14 PL
K
0.25 (0.010) M T B S A S
M
F
J
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A 8.55 8.75 0.337 0.344
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
F 0.40 1.25 0.016 0.049
G 1.27 BSC
0.050 BSC
J 0.19 0.25 0.008 0.009
K 0.10 0.25 0.004 0.009
M 0_ 7_ 0_ 7_
P 5.80 6.20 0.228 0.244
R 0.25 0.50 0.010 0.019
http://onsemi.com
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet MC74VHCT02A.PDF ] | |
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