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PDF MC74VHCT138A Data sheet ( Hoja de datos )

Número de pieza MC74VHCT138A
Descripción 3-to-8 Line Decoder
Fabricantes ON Semiconductor 
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MC74VHCT138A
3−to−8 Line Decoder
The MC74VHCT138A is an advanced high speed CMOS 3−to−8
decoder fabricated with silicon gate CMOS technology. It achieves
high speed operation similar to equivalent Bipolar Schottky TTL
while maintaining CMOS low power dissipation.
When the device is enabled, three Binary Select inputs (A0 − A2)
determine which one of the outputs (Y0 − Y7) will go Low. When
enable input E3 is held Low or either E2 or E1 is held High, decoding
function is inhibited and all outputs go high. E3, E2, and E1 inputs are
provided to ease cascade connection and for use as an address decoder
for memory systems.
The VHCT inputs are compatible with TTL levels. This device can
be used as a level converter for interfacing 3.3 V to 5.0 V, because they
have full 5.0 V CMOS level output swings.
The VHCT138A input structures provide protection when voltages
between 0 V and 5.5 V are applied, regardless of the supply voltage.
The output structures also provide protection when VCC = 0 V. These
input and output structures help prevent device destruction caused by
supply voltage − input/output voltage mismatch, battery backup, hot
insertion, etc.
Features
High Speed: tPD = 7.6 ns (Typ) at VCC = 5.0 V
Low
Power
Dissipation:
ICC
=
4
mA
(Max)
at
TA
=
25°C
www.DataSheet4U.com
TTL−Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V
Power Down Protection Provided on Inputs and Outputs
Balanced Propagation Delays
Designed for 4.5 V to 5.5 V Operating Range
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance:
Human Body Model > 2000 V;
Machine Model > 200 V
Chip Complexity: 122 FETs or 30.5 Equivalent Gates
Pb−Free Packages are Available*
http://onsemi.com
MARKING
DIAGRAMS
16
SOIC−16
D SUFFIX
CASE 751B
VHCT138AG
AWLYWW
11
16
TSSOP−16
VHCT
DT SUFFIX
138A
CASE 948F
ALYWG
G
11
A = Assembly Location
WL, L = Wafer Lot
Y = Year
WW, W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
PIN ASSIGNMENT
A0 1
A1 2
A2 3
E1 4
E2 5
E3 6
Y7 7
GND 8
16 VCC
15 Y0
14 Y1
13 Y2
12 Y3
11 Y4
10 Y5
9 Y6
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
January, 2006 − Rev. 3
1
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
Publication Order Number:
MC74VHCT138A/D

1 page




MC74VHCT138A pdf
A
tPLH
Y
VALID
1.5V
1.5V
VALID
tPHL
Figure 2.
MC74VHCT138A
SWITCHING WAVEFORMS
3V E3 1.5V
GND tPHL
VOH Y 1.5V
VOL
Figure 3.
3V
GND
tPLH
VOH
VOL
E2 or E1
Y
1.5V
tPHL
1.5V
Figure 4.
3V
GND
tPLH
VOH
VOL
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
CL*
*Includes all probe and jig capacitance
Figure 5. Test Circuit
ORDERING INFORMATION
Device
Package
Shipping
MC74VHCT138ADR2
SOIC−16
2500 Tape & Reel
MC74VHCT138ADR2G
SOIC−16
(Pb−Free)
2500 Tape & Reel
MC74VHCT138ADTR2
TSSOP−16*
2500 Tape & Reel
MC74VHCT138ADTRG
TSSOP−16*
2500 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
http://onsemi.com
5

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