PDF MC74VHCT374A Data sheet ( Hoja de datos )

Número de pieza	MC74VHCT374A
Descripción	Octal D-Type Flip-Flop
Fabricantes	ON Semiconductor
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No Preview Available ! MC74VHCT374A Octal D−Type Flip−Flop with 3−State Output The MC74VHCT374A is an advanced high speed CMOS octal flip−flop with 3−state output fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. This 8−bit D−type flip−flop is controlled by a clock input and an output enable input. When the output enable input is high, the eight outputs are in a high impedance state. The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The VHCT inputs are compatible with TTL levels. This device can be used as a level converter for interfacing 3.3 V to 5.0 V, because it has full 5.0 V CMOS level output swings. The VHCT374A input and output (when disabled) structures provide protection when voltages between 0 V and 5.5 V are applied, regardless of the supply voltage. These input and output structures help prevent device destruction caused by supply voltage−input/output voltage mismatch, battery backup, hot insertion, etc. Features • High Speed: fmax = 140 MHz (Typ) at VCC = 5.0 V www.DataSheet4U.com • Low Power Dissipation: ICC = 4 mA (Max) at TA = 25°C • TTL−Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V • Power Down Protection Provided on Inputs and Outputs • Balanced Propagation Delays • Designed for 4.5 V to 5.5 V Operating Range • Low Noise: VOLP = 1.6 V (Max) • Pin and Function Compatible with Other Standard Logic Families • Latchup Performance Exceeds 300 mA • ESD Performance: Human Body Model > 2000 V; Machine Model > 200 V • Chip Complexity: 276 FETs or 69 Equivalent Gates • Pb−Free Packages are Available* http://onsemi.com MARKING DIAGRAMS 20 VHCT374A 1 SOIC−20WB SUFFIX DW AWLYYWWG CASE 751D 1 20 1 TSSOP−20 SUFFIX DT CASE 948E 1 VHCT 374A ALYWG G 20 74VHCT374 SOEIAJ−20 AWLYWWG 1 SUFFIX M CASE 967 1 A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or G = Pb−Free Package (Note: Microdot may be in either location) FUNCTION TABLE INPUTS OUTPUT OE CP D Q L HH L LL L L, H, X No Change HXX Z For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2006 January, 2006 − Rev. 4 1 ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. Publication Order Number: MC74VHCT374A/D 1 page MC74VHCT374A DEVICE UNDER TEST TEST POINT OUTPUT CL Includes all probe and jig capacitance Figure 6. Test Circuit DEVICE UNDER TEST TEST POINT OUTPUT 1 kW CL CONNECT TO VCC WHEN TESTING tPLZ AND tPZL. CONNECT TO GND WHEN TESTING tPHZ AND tPZH. *Includes all probe and jig capacitance Figure 7. Test Circuit D0 D1 D2 D3 D4 D5 D6 D7 3 4 7 8 13 14 17 18 DQ DQ DQ DQ DQ DQ DQ DQ CP 11 OE 1 CCCCCCCC 2 5 6 9 12 15 16 19 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Figure 8. Expanded Logic Diagram http://onsemi.com 5 5 Page

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