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AT89C51SND1C 데이터시트 PDF




ATMEL Corporation에서 제조한 전자 부품 AT89C51SND1C은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 AT89C51SND1C 기능
기능 Single-Chip Flash Microcontroller
제조업체 ATMEL Corporation
로고 ATMEL Corporation 로고


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AT89C51SND1C 데이터시트, 핀배열, 회로
Features
MPEG I/II-Layer 3 Hardwired Decoder
– Stand-alone MP3 Decoder
– 48, 44.1, 32, 24, 22.05, 16 kHz Sampling Frequency
– Separated Digital Volume Control on Left and Right Channels (Software Control
using 31 Steps)
– Bass, Medium, and Treble Control (31 Steps)
– Bass Boost Sound Effect
– Ancillary Data Extraction
– CRC Error and MPEG Frame Synchronization Indicators
Programmable Audio Output for Interfacing with Common Audio DAC
– PCM Format Compatible
– I2S Format Compatible
8-bit MCU C51 Core Based (FMAX = 20 MHz)
2304 Bytes of Internal RAM
64K Bytes of Code Memory
– AT89C51SND1C: Flash (100K Erase/Write Cycles)
– AT83SND1C: ROM
4K Bytes of Boot Flash Memory (AT89C51SND1C)
– ISP: Download from USB (standard) or UART (option)
External Code Memory
– AT80C51SND1C: ROMless
USB Rev 1.1 Controller
– Full Speed Data Transmission
Built-in PLL
– MP3 Audio Clocks
– USB Clock
MultiMedia Card® Interface Compatibility
Atmel DataFlash® SPI Interface Compatibility
IDE/ATAPI Interface
2 Channels 10-bit ADC, 8 kHz (8-true bit)
– Battery Voltage Monitoring
– Voice Recording Controlled by Software
Up to 44 Bits of General-purpose I/Os
– 4-bit Interrupt Keyboard Port for a 4 x n Matrix
– SmartMedia® Software Interface
2 Standard 16-bit Timers/Counters
Hardware Watchdog Timer
Standard Full Duplex UART with Baud Rate Generator
Two Wire Master and Slave Modes Controller
SPI Master and Slave Modes Controller
Power Management
– Power-on Reset
– Software Programmable MCU Clock
– Idle Mode, Power-down Mode
Operating Conditions:
– 3V, ±10%, 25 mA Typical Operating at 25°C
– Temperature Range: -40°C to +85°C
Packages
– TQFP80, BGA81, PLCC84 (Development Board)
– Dice
Single-Chip
Flash
Microcontroller
with MP3
Decoder and
Human
Interface
AT83SND1C
AT89C51SND1C
AT80C51SND1C
4109LS–8051–02/08




AT89C51SND1C pdf, 반도체, 판매, 대치품
Figure 4-2. AT8xC51SND1C 81-pin BGA Package
9 8 7 65 4
P4.6
P2.0/
A8
P4.0/
MISO
P4.2/
SCK
VDD
P0.2/
AD2
P4.4
P4.7
P4.1/
MOSI
P4.3/
SS
P0.1/
AD1
P0.4/
AD4
P2.5/
A13
P2.2/
A10
P2.1/
A9
P0.6
VSS
P5.1
3
P0.3/
AD3
P0.0/
AD0
P1.0/
KIN0
21
P5.0
ALE
ISP1/
PSEN2
NC
P1.3/
KIN3
P1.1
P1.2/
KIN2
P2.4/
A12
P2.6/
A14
P4.5
P0.7/
AD7
P0.5/
AD5
P1.6/
SCL
P1.7/
SDA
P1.5
P1.4
VDD
P2.3/
A11
VSS
P2.7/
A15
FILT PVDD
X1
VDD
RST MCMD MCLK MDAT AVDD
P3.4/
T0
UVSS PVSS
X2
DSEL SCLK DOUT P5.3
P3.7/
RD
P3.5/
T1
VDD
TST
VSS
DCLK VSS
AIN1 AVSS AIN0
P3.3/
INT1
P3.1/
TXD
D- UVDD
VDD
P5.2
AREFP AREFN
P3.6/
WR
P3.2/
INT0
P3.0/
RXD
VSS
D+
A
B
C
D
E
F
G
H
J
Notes: 1. ISP pin is only available in AT89C51SND1C product.
Do not connect this pin on AT83SND1C and AT80C51SND1C product.
2. PSEN pin is only available in AT80C51SND1C product.
4 AT8xC51SND1C
4109LS–8051–02/08

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AT89C51SND1C 전자부품, 판매, 대치품
AT8xC51SND1C
Signal
Name
T0
T1
Type Description
Timer 0 External Clock Input
I When timer 0 operates as a counter, a falling edge on the T0 pin
increments the count.
Timer 1 External Clock Input
I When timer 1 operates as a counter, a falling edge on the T1 pin
increments the count.
Alternate
Function
P3.4
P3.5
Table 4. Audio Interface Signal Description
Signal
Name
DCLK
DOUT
DSEL
SCLK
Type Description
O DAC Data Bit Clock
O DAC Audio Data
O
DAC Channel Select Signal
DSEL is the sample rate clock output.
DAC System Clock
O SCLK is the oversampling clock synchronized to the digital audio data
(DOUT) and the channel selection signal (DSEL).
Alternate
Function
-
-
-
-
Table 5. USB Controller Signal Description
Signal
Name
Type Description
USB Positive Data Upstream Port
D+ I/O This pin requires an external 1.5 Kpull-up to VDD for full speed
operation.
D- I/O USB Negative Data Upstream Port
Alternate
Function
-
-
Table 6. MutiMediaCard Interface Signal Description
Signal
Name
MCLK
MCMD
MDAT
Type Description
O
MMC Clock output
Data or command clock transfer.
MMC Command line
I/O
Bidirectional command channel used for card initialization and data
transfer commands. To avoid any parasitic current consumption,
unused MCMD input must be polarized to VDD or VSS.
MMC Data line
I/O Bidirectional data channel. To avoid any parasitic current consumption,
unused MDAT input must be polarized to VDD or VSS.
Alternate
Function
-
-
-
4109LS–8051–02/08
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