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PDF SY100S321 Data sheet ( Hoja de datos )
| Número de pieza | SY100S321 | |
| Descripción | Low-power 9-BIT Inverter | |
| Fabricantes | Micrel Semiconductor | |
| Logotipo |  |
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LOW-POWER 9-BIT
INVERTER
SY100S321
FINAL
FEATURES
DESCRIPTION
s Max. propagation delay of 700ps
s IEE min. of –55mA
s Extended supply voltage option:
VEE = –4.2V to –5.5V
s Voltage and temperature compensation for
improved noise immunity
s 70% faster than Fairchild 300K at lower power
s Internal 75KΩ input pull-down resistors
s Function and pinout compatible with Fairchild F100K
s Available in 24-pin CERPACK and 28-pin PLCC
packages
BLOCK DIAGRAM
The SY100S321 is a monolithic 9-bit inverter. The device
contains nine inverting buffer gates with single input and
output.
PIN CONFIGURATIONS
D6
D7
VEE
VEES
VCCA
D8
D9
11 10 9 8 7 6 5
12
13
14 Top View
15
PLCC
J28-1
16
17
18
4
3
2
1
28
27
26
19 20 21 22 23 24 25
O7
O8
VCCA
VCC
VCC
O9
O1
D1 O1
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D2 O2
D3 O3
D4 O4
D1
D2
D3
VCCA
O3
24 23 22 21 20 19
1 18
2 17
3 Top View 16
4
Flatpack
F24-1
15
5 14
D5
D4
VCCA
Q4
Q5
D5 O5
O2 6
13 Q6
7 8 9 10 11 12
D6 O6
D7 O7
D8 O8
D9 O9
PIN NAMES
Pin
D1 – D9
Q1 – Q9
VEES
VCCA
Function
Data Inputs
Data Outputs
VEE Substrate
VCCO for ECL Outputs
Rev.: G Amendment: /0
1 Issue Date: July, 1999
1 page  
Micrel
28 LEAD PLCC (J28-1)
SY100S321
Rev. 03
MICREL-SYNERGY 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA
TEL + 1 (408) 980-9191 FAX + 1 (408) 914-7878 WEB http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or
other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.
© 2000 Micrel Incorporated
5
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| Páginas | Total 5 Páginas | |
| PDF Descargar | [ Datasheet SY100S321.PDF ] | |
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