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PDF T6829 Data sheet ( Hoja de datos )

Número de pieza T6829
Descripción (T6819 / T6829) Dual Triple DMOS Output Driver
Fabricantes ATMEL Corporation 
Logotipo ATMEL Corporation Logotipo



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Features
Supply Voltage up to 40 V
RDSon Typically 0.5 at 25°C, Maximum 1 at 150°C
Up to 1.5 A Output Current
Three High-side and Three Low-side Drivers Usable as Single Outputs or Half Bridges
Capable to Switch all Kinds of Loads such as DC Motors, Bulbs, Resistors, Capacitors
and Inductors
PWM Capability for Each Output Controlled by External PWM Signal
No Shoot-through Current
Very Low Quiescent Current IS < 5 µA in Standby Mode over Total Temperature Range
Outputs Short-circuit Protected
Selective Overtemperature Protection for Each Switch and Overtemperature
Prewarning
Undervoltage Protection
Various Diagnostic Functions such as Shorted Output, Open Load, Overtemperature
and Power-supply Fail Detection
Serial Data Interface, Daisy Chain Capable, up to 2 MHz Clock Frequency
SO16 Power Package
Description
The T6819/T6829 are fully protected driver interfaces designed in 0.8 µm BCDMOS
technology. They are used to control up to six different loads by a microcontroller in
automotive and industrial applications.
Each of the three high-side and three low-side drivers is capable to drive currents up
to 1.5 A. Each driver is freely configurable and can be controlled separately from a
standard serial data interface. Therefore, all kinds of lowwawd.DastaSsheuetc4Uh.comas bulbs, resistors,
capacitors and inductors can be combined. The IC design especially supports the
applications of H-bridges to drive DC motors. The capability to control each output
with an external PWM signal opens additional applications.
Protection is guaranteed regarding short-circuit conditions, overtemperature and und-
ervoltage. Various diagnostic functions and a very low quiescent current in stand-by
mode opens a wide range of applications. Automotive qualification (protection against
conducted interferences, EMC protection and 2-kV ESD protection) gives added value
and enhanced quality for exacting requirements of automotive applications.
Dual Triple
DMOS Output
Driver with
Serial Input
Control
T6819/T6829
Preliminary
Rev. 4531A–BCD–10/02
1

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T6829 pdf
T6819/T6829
Output Data Protocol
Output (Status)
Bit Register
0 TP
1 Status LS1
2 Status HS1
3 Status LS2
4 Status HS2
5 Status LS3
6 Status HS3
7 n. u.
8 n. u.
9 n. u.
10 n. u.
11 n. u.
12 n. u.
13 OVL
14 INH
15 PSF
Function
Temperature prewarning: high = warning
Normal operation: high = output is on, low = output is off
Open-load detection: high = open load, low = no open load
(correct load condition is detected if the corresponding output is
switched off); not affected by SRR
Normal operation: high = output is on, low = output is off
Open-load detection: high = open load, low = no open load
(correct load condition is detected if the corresponding output is
switched off); not affected by SRR
Description see LS1
Description see HS1
Description see LS1
Description see HS1
Not used
Not used
Not used
Not used
Not used
Not used
Over-load detected: set high, when at least one output is
switched off by a short-circuit condition or an overtemperature
event. Bits 1 to 6 can be used to detect the affected switch.
(open-load detection bit OLD = high)
Inhibit: this bit is controlled by software (bit SI in input register)
High = standby, low = normal operation
Power-supply fail: undervoltage at Pin VS detected
After power-on reset, the input register has the following status
Bit 15
SI
Bit 14
OCS
Bit 13
OLD
Bit 12
PH3
Bit 11
PL3
Bit 10
PH2
Bit 9
PL2
Bit 8
PH1
Bit 7
PL1
Bit 6
HS3
Bit 5
LS3
Bit 4
HS2
Bit 3
LS2
Bit 2
HS1
Bit 1
LS1
Bit 0
SRR
H H H L L L L L L L L L L LL L
The following patterns are used to enable internal test modes of the IC. It is not recommended to use these patterns during
normal operation.
Bit 15 Bit 14
Bit 13
(OCS)
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
(HS3)
Bit 5
(LS3)
Bit 4
(HS2)
Bit 3
(LS2)
Bit 2 Bit 1
(HS1) (LS1)
Bit 0
(SRR)
HH H H H L L L L L L L L LL L
HH H L L H H L L L L L L LL L
HH H L L L L H H L L L L LL L
4531A–BCD–10/02
5

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T6829 arduino
T6819/T6829
Electrical Characteristics (Continued)
7.5 V < VS < 40 V; 4.75 V < VCC < 5.25 V; INH = High; -40°C < Tj < 150°C; unless otherwise specified,
all values refer to GND pins.
No. Parameters
Test Conditions
Pin Symbol Min. Typ. Max. Unit Type*
Leakage current
6.3
(tristate)
VCS= VCC
0V < VDO < VVCC
7 Inhibit Input – Timing
10 IDO -10
10 µA
A
Delay time from
7.1 standby to normal
operation
tdINH
100 µs
A
*) Type means: A =100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Note: 1. Delay time between rising edge of input signal at Pin CS after data transmission and switch on/off output stages to 90% of
final level. Device not in standby for t > 1 ms.
2. Delay time between rising/falling edge of input signal at Pin PWM and switch on/off output stages to 90% of final level.
3. Difference between switch-on and switch-off delay time of input signal at Pin PWM to output stages in PWM mode.
Serial Interface – Timing
No. Parameters
Test
Conditions
Pin Timing Chart No. (1) Symbol Min. Typ. Max.
8.1
DO enable after
CS falling edge
CDO = 100 pF
10
1
tENDO
200
8.2
DO disable after
CS rising edge
CDO = 100 pF
10
2
tDISDO
200
8.3 DO fall time
CDO = 100 pF
10
-
tDOf
100
8.4 DO rise time
CDO = 100 pF
10
-
tDOr
100
8.5 DO valid time
CDO = 100 pF
10
10
tDOVal
200
8.6 CS setup time
5
4
tCSSethl
225
8.7 CS setup time
5
8
tCSSetlh
225
8.8 CS high time
59
tCSh 500
8.9 CLK high time
75
tCLKh
225
8.10 CLK low time
76
tCLKl
225
8.11 CLK period time
7-
tCLKp
500
8.12 CLK setup time
7
7
tCLKSethl
225
8.13 CLK setup time
7
3
tCLKSetlh
225
8.14 DI setup time
6 11
tDIset
40
8.15 DI hold time
6
12
tDIHold
40
*) Type means: A =100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Note: 1. see Figure 4
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Type*
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
4531A–BCD–10/02
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