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PDF A8530 Data sheet ( Hoja de datos )

Número de pieza A8530
Descripción Ultracompact 6-Channel Backlight and Flash/Torch White LED Driver
Fabricantes Allegro MicroSystems 
Logotipo Allegro MicroSystems Logotipo



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A8530
Ultracompact 6-Channel Backlight
and Flash/Torch White LED Driver
Features and Benefits
Proprietary adaptive control scheme (1×, 1.5×, 2×)
0.5% typical LED current matching
2 separate serial interfaces for dimming control
Drives up to 6 white LEDs (4 display backlight, 2 flash/torch)
30 mA per LED channel for display backlight
100 mA per LED channel for flash/torch backlight
320 mA total output current capability
Low EMI design and soft-start function
Short circuit, overvoltage, thermal shutdown protection
0.75 mm very thin profile, 3 mm × 3 mm package
Package: 16 pin QFN/MLP (suffix ES)
Description
The A8530 high efficiency charge pump ICs offer a simple,
low-cost white LED driver solution for driving four display
backlight and two flash/torch/video mode white LEDs. Using
a proprietary control scheme (1×, 1.5×, and 2×), the A8530
can deliver well-matched LED current while maintaining the
highest efficiency and low EMI. The LED current is regulated
over the entire range of Li+ battery voltage to provide uniform
intensity.
LED brightness and on/off can be controlled for 4 display
backlight LEDs and 2 flash/torch LEDs through 2 single-wire
serial interface pins.
TheA8530 is available in a very thin profile (0.75 mm nominal
height) 3 mm× 3 mm QFN/MLP 16 pin package. Applications
include:
White LED backlights for cellular phones, PDAs
Digital cameras, camcorders
Other portable device white LED backlighting
320 mA WLED flash/torch
Approximate Scale 1:1
www.DataSheet4U.com
Typical Applications
VBATT
2.7 to 5.5 V
CIN
4.7 µF
C1
1 µF
C2
1 µF
RSET
On/Off and
Dimming
Control
VIN VOUT
C1+ LED1
C1– LED2
C2+ A8530
LED3
C2–
ISET
LED4
ENM
LED5
ENF GND LED6
COUT
4.7 µF
D1
D2
D3
D4
D5
D6
D1-D4 Backlight; D5-D6 Flash
Figure 1. 4 × 30 mA backlight with 2 × 100 mA flash
VBATT
2.7 to 5.5 V
CIN
4.7 µF
C1
1 µF
C2
1 µF
RSET
On/Off and
Dimming
Control
VIN VOUT
C1+ LED1
C1– LED2
C2+ A8530
LED3
C2–
ISET
LED4
ENM
LED5
ENF GND LED6
COUT
4.7 µF
D1
8530-DS
Figure 3. 320 mA flash
VBATT
2.7 to 5.5 V
CIN
4.7 µF
C1
1 µF
C2
1 µF
RSET
On/Off and
Dimming
Control
VIN VOUT
COUT
4.7 µF
C1+
LED1
D1
C1– LED2
C2+ A8530
LED3
C2–
ISET
LED4
ENM
LED5
ENF GND LED6
D5
D6
D1-D4 Backlight; D5-D6 Flash
Figure 2. 3 × 100 mA flash
VBATT
CIN
1 μF
RSET
On/Off and
Dimming
Control
VIN VOUT
C1+
LED1
D1
C1–
LED2
D2
C2+ A8530
D3
LED3
C2– D4
ISET
LED4
D5
ENM
LED5
D6
ENF GND LED6
D1-D4 Main; D5-D6 Flash
VIN>Vf(max)+0.2 V, Vf = LED forward drop
Figure 4. High efficiency current sink

1 page




A8530 pdf
A8530
Ultracompact 6-Channel Backlight
and Flash/Torch White LED Driver
Performance Characteristics
Tests performed using application circuit shown in figure 1
TA= 25°C, VIN= 3.6 V (unless otherwise noted)
95
90
85
80
75
70
65
60
55
2.7
Efficiency versus Supply Voltage
for LED1 through LED4, in parallel
VFx = 3.4 V
IFx = 20 mA
VFx = 3.1 V
IFx = 10 mA
3.1 3.5 3.9 4.3 4.7 5.1
VIN (V)
5.5
95
90
85
80
75
70
65
60
55
2.7
Efficiency versus Supply Voltage
for LED5 and LED6, in parallel
VFx = 3.7 V
IFx = 100 mA
VFx = 3.2 V
IFx = 50 mA
3.1 3.5 3.9 4.3 4.7 5.1
VIN (V)
5.5
Logic Level
RSET versus ILED
1.2 35
1.1
VHI
1.0
0.9
0.8
VLO
0.7
30
25
RSET = 6.NŸ
20
RSET = NŸ
15
10
0.6 5
0.5
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
VIN (V)
0
4 6 8 10 12 14 16
RSET (
Dimming on ENM
Enable Pulses versus Total Current, LED1 through LED4
VENM
C1
C2
t
ILED14
Symbol
C1
C2
t
Parameter
VENM
ILED14
time
Units/Division
0.5 V
50 mA
50 ms
Allegro MicroSystems, Inc.
5
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com

5 Page





A8530 arduino
A8530
Ultracompact 6-Channel Backlight
and Flash/Torch White LED Driver
Package ES, 3 × 3 mm 16-Pin QFN/MLP
3.15 .124
2.85 .112
16
Preliminary dimensions, for reference only
(reference JEDEC MO-220WEED-4)
Dimensions in millimeters
U.S. Customary dimensions (in.) in brackets, for reference only
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A Terminal #1 mark area
1
A
2
B Exposed thermal pad (reference only, terminal #1
identifier appearance at supplier discretion)
C Reference land pattern layout (reference IPC7351
QFN50P300X300X80-17W4M); adjust as necessary to
meet application process requirements and PCB layout
tolerances; when mounting on a multilayer PCB, thermal
vias at the exposed thermal pad land can improve thermal
dissipation (reference EIA/JEDEC Standard JESD51-5)
0.90 .035
NOM
0.30 .012
NOM
0.50 .020
16 NOM
16X
0.08 [.003] C
16X 0.30 .012
0.18 .007
0.10 [.004] M C A B
0.05 [.002] M C
0.50 .020
1.70 .067
NOM
C
12X 0.20 .008
MIN
1
1.70 .067
NOM
3.10 .122
NOM
0.50 .020
0.30 .012
2
1
B
4X 0.20 .008
MIN
1.70 .067
NOM
3.10 .122
NOM
4X 0.20 .008
MIN
16
0.23 x 0.23 .009 x .009
REF
A
B
3.15 .124
2.85 .112
C
SEATING
PLANE
0.80 .031
0.70 .028
0.20 .008
REF
0.05 .002
0.00 .000
1.70 .067
NOM
The products described here are manufactured under one or more U.S. patents or U.S. patents pending.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detailed specifications as may be required to per-
mit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro products are not authorized for use as critical components in life-support devices or systems without express written approval.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use;
nor for any infringement of patents or other rights of third parties which may result from its use.
Copyright©2005, 2006 Allegro MicroSystems, Inc.
Allegro MicroSystems, Inc.
11
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com

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