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부품번호 | FDC638APZ 기능 |
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기능 | N-Channel MOSFET | ||
제조업체 | Fairchild Semiconductor | ||
로고 | |||
전체 5 페이지수
December 2006
FDC638APZ
P-Channel 2.5V PowerTrench® Specified MOSFET
–20V, –4.5A, 43mΩ
Features
General Description
Max rDS(on) = 43mΩ at VGS = –4.5V, ID = –4.5A
Max rDS(on) = 68mΩ at VGS = –2.5V, ID = –3.8A
Low gate charge (8nC typical).
High performance trench technology for extremely low rDS(on).
SuperSOTTM –6 package:small footprint (72% smaller than
standard SO–8) low profile (1mm thick).
RoHS Compliant
This P-Channel 2.5V specified MOSFET is produced using
Fairchild Semiconductor’s advanced PowerTrench® process
that has been especially tailored to minimize the on-state
resistance and yet maintain low gate charge for superior
switching performance
These devices are well suited for battery power applications:load
switching and power management,battery charging circuits,and
DC/DC conversion.
Application
DC - DC Conversion
S
D
D
Pin 1
G
D
D
SuperSOTTM -6
www.DataSheet4U.com
D1
D2
G 33
6D
5D
4S
MOSFET Maximum Ratings TA= 25°C unless otherwise noted
Symbol
VDS
VGS
ID
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Pulsed
Power Dissipation
Power Dissipation
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 1a)
(Note 1b)
RθJA
RθJA
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1a)
(Note 1b)
Device Marking
.638Z
Device
FDC638APZ
Reel Size
7’’
Ratings
–20
±12
–4.5
–20
1.6
0.8
–55 to +150
Units
V
V
A
W
°C
78 °C/W
156
Tape Width
8mm
Quantity
3000 units
©2006 Fairchild Semiconductor Corporation
FDC638APZ Rev.B
1
www.fairchildsemi.com
Typical Characteristics TJ = 25°C unless otherwise noted
5
ID = -4.5A
4
3
2
VDD = -5V
VDD = -10V
VDD = -15V
2000
1000
Ciss
Coss
1
0
0 2 4 6 8 10
Qg, GATE CHARGE(nC)
Figure 7. Gate Charge Characteristics
12
1
VGS = 0V
0.1
0.01
TJ = 150oC
1E-3
1E-4
TJ = 25oC
1E-5
0
5 10 15
-VGS, GATE TO SOURCE VOLTAGE(V)
Figure 9. Gate Leakage Current vs Gate to
Source Voltage
20
100
70
0.1
f = 1MHz
VGS = 0V
Crss
1 10
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure8. CapacitancevsDrain
to Source Voltage
20
100
rDS(on) LIMIT
10
10us
100us
1ms
1 10ms
100ms
0.1
0.01
0.1
SINGLE PULSE
TJ = MAX RATED
TA = 25OC
1s
DC
1 10
-VDS, DRAIN to SOURCE VOLTAGE (V)
50
Figure 10. Forward Bias Safe
Operating Area
50
SINGLE PULSE
40
RθJA = 156oC/W
TA=25oC
30
20 SINGLE PULSE
10
0
10-3
10-2
10-1
100
101
102
t, PULSE WIDTH (s)
Figure 11. Single Pulse Maximum Power Dissipation
1 DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.1 0.05
0.02
0.01
PDM
0.01
SINGLE PULSE
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
0.001
10-4
10-3
PEAK TJ = PDM x ZθJA x RθJA + TA
10-2
10-1
100
101
t, RECTANGULAR PULSE DURATION (s)
102
Figure 12. Transient Thermal Response Curve
FDC638APZ Rev.B
4 www.fairchildsemi.com
4페이지 | |||
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부품번호 | 상세설명 및 기능 | 제조사 |
FDC638APZ | N-Channel MOSFET | Fairchild Semiconductor |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |