PDF FIN24A Data sheet ( Hoja de datos )

Número de pieza	FIN24A
Descripción	Low Voltage 24-Bit Bi-Directional Serializer/Deserializer
Fabricantes	Fairchild Semiconductor
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No Preview Available ! Preliminary April 2005 Revised May 2005 FIN24A PSerDes Low Voltage 24-Bit Bi-Directional Serializer/Deserializer with Multiple Frequency Ranges (Preliminary) General Description Features The FIN24A allows for a pair of SerDes to interleave data s Low power consumption from two different data sources going opposite directions or standard bi-directional interface operation. The bi-direc- tional data flow is controlled through use of a direction (DIRI) control pin. The devices can be configured to oper- s Low power standards based LVDS differential interface s LVCMOS parallel I/O interface • 2 mA source/sink current ate in a unidirectional mode only by hardwiring the DIRI • Over-voltage tolerant control signals pin. An internal PLL generates the required bit clock fre- quency for transfer across the serial link. The FIN24A sup- ports multiple input frequency ranges which are selected by the S1 and S2 control pins. Options exist for dual or sin- gle PLL operation dependent upon system operational parameters. The device has been designed for low power s I/O Power Supply range between 1.65V and 3.6V s Analog Power Supply range of 2.775V r 5% s Multi-Mode operation allows for a single device to operate as Serializer or Deserializer s Internal PLL with no external components operation and utilizes Fairchild Low Power LVDS interface. s Standby Power-Down mode support The device also supports an ultra low power Power-Down mode for conserving power in battery operated applica- tions. s Small footprint 40-terminal MLP packaging s Built in differential termination s Supports external CKREF frequencies between 2MHz www.DataSheaetn4Ud.c3o0mMHz s Serialized data rate up to 780Mb/s Ordering Code: Order Number Package Number Package Description FIN24AGFX (Preliminary) BGA042A Pb-Free 42-Ball Ultra Small Scale Ball Grid Array (USS-BGA), JEDEC MO-195, 3.5mm Wide FIN24AMLX MLP040A Pb-Free 40-Terminal Molded Leadless Package (MLP), Quad, JEDEC MO-220, 6mm Square Pb-Free package per JEDEC J-STD-020B. BGX and MLP packages available in Tape and Reel only. PSerDes¥ is a trademark of Fairchild Semiconductor Corporation. © 2005 Fairchild Semiconductor Corporation DS500888 www.fairchildsemi.com 1 page Serializer Operation Mode (Continued) Preliminary FIGURE 1. Serializer Timing Diagram (CKREF equals STROBE) FIGURE 2. Serializer Timing Diagram (CKREF does not equal STROBE) FIGURE 3. Serializer Timing Diagram Using Provided Bit Clock (No CKREF) 5 www.fairchildsemi.com 5 Page DC Electrical Characteristics (Continued) Preliminary Symbol Parameter Test Conditions Min Typ Max (Note 3) Unit IIN Input Current VIN VDD 0.3V or 0V VDD 0V or VDD r20.0 PA Note 3: Typical Values are given for VDD 2.5V and TA 25qC. Positive current values refer to the current flowing into device and negative values means current flowing out of pins. Voltage are referenced to GROUND unless otherwise specified (except 'VOD and VOD). Note 4: The definition of short-circuit includes all the possible situations. For example, the short of differential pairs to Ground, the short of differential pairs (No Grounding) and either line of differential pairs tied to Ground. Power Supply Currents Symbol IDDA1 IDDA2 IDDS1 IDDS2 IDDS IDD_PD IDD_SER1 IDD_DES1 IDD_SER2 Parameter VDDA Serializer Static Supply Current VDDA Deserializer Static Supply Current VDDS Serializer Static Supply Current VDDS Deserializer Static Supply Current VDDA Static Supply Current VDD Power-Down Supply Current IDD_PD IDDA IDDS IDDP 26:1 Dynamic Serializer Power Supply Current IDD_SER1 IDDA IDDS IDDP 1:26 Dynamic Deserializer Power Supply Current IDD_DES1 IDDA IDDS IDDP 26:1 Dynamic Serializer Power Supply Current IDD_SER2 IDDA IDDS IDDP Test Conditions All DP and Control Inputs at 0V or VDD NOCKREF, S2 0, S1 1, DIR 1 All DP and Control Inputs at 0V or VDD NOCKREF, S2 0, S1 1, DIR 0 All DP and Control Inputs at 0V or VDD NOCKREF, S2 0, S1 1, DIR 1 All DP and Control Inputs at 0V or VDD NOCKREF, S2 0, S1 1, DIR 0 All DP and Control Inputs at 0V or VDD S1 S2 0 S1 S2 0, All Inputs at GND or VDD S2 L 2 MHz CKREF STROBE S1 H 5 MHz DIRI H S2 H 5 MHz See Figure 13 S1 L 15 MHz S2 H 10 MHz S1 H 30 MHz S2 L 2 MHz CKREF STROBE S1 H 5 MHz DIRI L S2 H 5 MHz See Figure 13 S1 L 15 MHz S2 H 10 MHz S1 H 30 MHz NO CKREF 2 MHz STROBE o Active 5 MHz CKSI 15X Strobe 10 MHz DIRI H 15 MHz See Figure 13 30 MHz Min Typ TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD Max TBD TBD TBD TBD TBD 5.0 TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD Units PA mA mA mA mA PA mA mA mA 11 www.fairchildsemi.com 11 Page

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