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SVG-2066 데이터시트 PDF




Sirenza Microdevices에서 제조한 전자 부품 SVG-2066은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

PDF 형식의 SVG-2066 자료 제공

부품번호 SVG-2066 기능
기능 Variable Gain Amp
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SVG-2066 데이터시트, 핀배열, 회로
www.DataSheet4U.com
Product Description
Sirenza Microdevices’ SVG-2066 is an IC based 6-bit digi-
tal 31.5dB range attenuator cascaded with a linear class A
amplifier in a low-cost surface-mountable 6x6 QFN plastic
package. This product is specifically designed as a high lin-
earity variable gain amplifier for infrastructure equipment
that can be used in either the RF transmit or RF receive
path. It features both parallel or serial programmability, pro-
grammable power up states, latchable parallel control, 3V
or 5V combatible logic and robust Class 1B ESD. The SVG-
2066 features configurable pin I/O’s for optimizing the part
over application specific bands.
Functional Block Diagram
Serial or
Parallel Select
S-P
VDD
2 Bit Power Up
State Programming
U1 U2
Serial Interface
DATA
CLK
LE
VCC
RFIN
RFOUT
Advanced Information
SVG-2066 / SVG-2066Z
500MHz - 2200MHz 6-Bit Variable Gain Amp
Pb RoHS Compliant
& Green Package
6mm x 6mm QFN Package
Product Features
P1dB = 25dBm @ 2140MHz
OIP3 Typical 41dBm @ 2GHz
Gain = 15dB at 850MHz
31.5dB Attenuation range in 0.5dB steps
Serial or Parallel Controlled
Optional Latched Parallel Control
Programmable Power Up States
Immune to Latch-Up
Positive Supply Voltage
3V or 5V Logic Compatible
Applications
CDMA, W-CDMA Tx and Rx
P0.5 P1 P2 P4 P8 P16
6-Bit Parallel Interface
GSM, EDGE Tx and Rx
High Performance VGA applications
Key Specifications
Symbol
Parameters: Test Conditions, App circuit page 4
Z0 = 50, VCC = 5.0V, Vdd=3V, I = 115mA, TL= 30ºC
Unit Min. Typ.
fO Frequency of Operation
MHz
500
P1dB
Output Power at 1dB Compression – 850MHz
Output Power at 1dB Compression – 2.14GHz
dBm
23.5
24
25
Max.
2200
Small Signal Gain – 850MHz @ 0dB state
S21 Small Signal Gain – 2.14GHz @ 0dB state
15
dB
9.5 11 13.5
Third Order Intercept (Pout = 9dBm per tone) - 850MHz
IP3 dBm
Third Order Intercept (Pout = 9dBm per tone) - 2.14GHz
39
39
41
Noise Figure at 850 MHz @ 0 dB state
5.9
NF dB
Noise Figure at 2140 MHz @ 0 dB state
6.9 7.9
IRL
ORL
Input Return Loss 850-2200 MHz ( 0dB attenuation )
Output Return Loss 850-2200MHz ( 0dB attenuation )
9 12
dB
9 12
Ts 10%/90% Settling time
nS 320
Icq Current (Vcc = 5V,Vdd=3v)
mA 100 115 130
Rth, j-l
Thermal Resistance (junction - lead)
ºC/W
70
The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or ommisions.
Sirenza Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without
notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. Sirenza Microdevices does not authorize or warrant any Sirenza Microdevices product
for use in life-support devices and/or systems.
Copyright 2002 Sirenza Microdevices, Inc. All worldwide rights reserved.
303 South Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC
http://www.sirenza.com
1 EDS-104432 Rev 3




SVG-2066 pdf, 반도체, 판매, 대치품
Pin Out Description
Pin #
Label
2,3,20,26,28
1,7,8,10,16,
21,23,24,25,30
4
N/C
GND
RFIN
5 J1
6 ATIN
9 P8
11 P4
12 P2
13 P1
14 P0.5
15 P16
17 ATOUT
18 J2
19 J3
22 AMPIN
27 RFOUT
29 VCC
31 Data
32 CLK
33
34, 35
LE
U1 / U2
36 J5
37 J4
38 VDD
39 S-P
40 VSS
EPAD
GND
Advanced Information
SVG-2066 500MHz-2200MHz 6-Bit VGA
Description
These are unused pins and not wired inside the package. May be grounded or connected to adjacent pins.
Pins are internally grounded
RF input pin. Connects to 100pF cap inside package.
Jumper this pin on the PC board to the attenuator input (ATIN) pin #6. Connects to 100pF cap inside package.
Attenuator input pin
Parallel interface attenuation control bit 8 dB. When in serial mode P0.5, P1, P2, P4, P8 and P16 logic dictate power up state.
Parallel interface attenuation control bit 4 dB. When in serial mode P0.5, P1, P2, P4, P8 and P16 logic dictate power up state.
Parallel interface attenuation control bit 2 dB. When in serial mode P0.5, P1, P2, P4, P8 and P16 logic dictate power up state.
Parallel interface attenuation control bit 1 dB. When in serial mode P0.5, P1, P2, P4, P8 and P16 logic dictate power up state.
Parallel interface attenuation control bit 0.5dB. When in serial mode P0.5, P1, P2, P4, P8 and P16 logic dictate power up state.
Parallel interface attenuation control bit 16dB. When in serial mode P0.5, P1, P2, P4, P8 and P16 logic dictate power up state.
Attenuator output pin.
Jumper this pin to the attenuator output pin (ATOUT). Connects to 100pF cap inside package.
Connect this pin to the amplifier input pin (AMPIN) with the appropriate AMPIN impedance matching
Amplifier input pin. Internally connected to base of amplifier (~1.3V)
Amplifier RF output pin. Internally connected to 5V. Not matched to 50 ohm. Use appropriate matching circuit.
Power Supply pin to Amplifier. Apply 5.0V to this pin.
Serial interface data input.
Serial interface clock input.
Latch enable input. Parallel mode can also be latch enabled with this pin.
Parallel mode power-up state logic bits. 0/0 = 0dB, 1/0 = 8dB, 0/1=16dB, 1/1=31dB
Jumper this pin to GND on the PC board. Connects to 1000pF cap inside package.
Jumper this pin on PC board to VDD pin 38. Connects to 1000pF bypass cap inside package.
Power supply pin to Digital Attenuator. Apply 2.7-3.3V to this pin. May be set from another voltage with a voltage divider (pulls 40uA typ, 100uA max)
Serial or parallel mode select. Logic low for parallel mode. Logic high for serial mode.
Negative supply voltage or GND
Exposed area on the bottom side of the package . GND with vias as shown in recommended landing pattern.
VSS S-P VDD J4 J5 U2 U1 LE CLK DATA
40 39 38 37 36 35 34 33 32 31
GND 1
NC 2
NC 3
RFIN 4
J1 5
ATIN 6
GND 7
GND 8
P8 9
10
GND
30 GND
29 VCC
28 N C
27 RFOUT
26 N C
25 GND
24 GND
23 GND
22 AMPIN
21 GND
11 12
P4 P2
13 14 15 16
17 18
P1 P0.5 P16 GND ATOUT J2
19
J3
20
NC
303 South Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC
4
http://www.sirenza.com
EDS-104432 Rev 3

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SVG-2066 전자부품, 판매, 대치품
Advanced Information
SVG-2066 500MHz-2200MHz 6-Bit VGA
Measured 850MHz Evaluation Board Data (Vcc = 5.0V, Vdd=3.0V, Iq =115mA)
S11 vs. Frequency, T=+85c
S21 vs. Frequency, T=+85c
0.0
-5.0
-10.0
-15.0
-20.0
-25.0
-30.0
-35.0
Atten.
level(dB)
0
1
2
4
8
16
31
20.0
15.0
10.0
5.0
0.0
-5.0
-10.0
-15.0
-20.0
-25.0
Atten.
level(dB)
0
1
2
4
8
16
31
-40.0
700 750 800 850 900 950 1000
Freq. (MHz)
-30.0
700 750 800 850 900 950 1000
Freq. (MHz)
0.0
-5.0
-10.0
-15.0
-20.0
-25.0
-30.0
-35.0
-40.0
-45.0
-50.0
700
S22 vs. Frequency, T=+85c
Atten.
level(dB)
0
1
2
4
8
16
31
750 800 850 900 950 1000
Freq. (MHz)
0.4
0.2
0.0
-0.2
-0.4
-0.6
-0.8
-1.0
-1.2
-1.4
-1.6
-1.8
-2.0
700
T=+85c Attenuation Error vs. Frequency
750 800 850 900 950
Freq. (MHz)
Atten.
level(dB)
1
2
4
8
16
31
1000
Output IP3 vs atten level
60
50
40
30
20
10
0
5 10 15 20 25 30
Atten(dB)
+25c -40c +85c
Input IP3 vs atten level
60
50
40
30
20
10
0
5 10 15 20 25 30
Atten(dB)
+25c -40c +85c
303 South Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC
7
http://www.sirenza.com
EDS-104432 Rev 3

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