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PDF HFA3101 Data sheet ( Hoja de datos )
| Número de pieza | HFA3101 | |
| Descripción | Gilbert Cell UHF Transistor Array | |
| Fabricantes | Intersil Corporation | |
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®
Data Sheet
September 2004
HFA3101
FN3663.5
Gilbert Cell UHF Transistor Array
The HFA3101 is an all NPN transistor array configured as a
Multiplier Cell. Based on Intersil’s bonded wafer UHF-1 SOI
process, this array achieves very high fT (10GHz) while
maintaining excellent hFE and VBE matching characteristics
that have been maximized through careful attention to circuit
design and layout, making this product ideal for
communication circuits. For use in mixer applications, the
cell provides high gain and good cancellation of 2nd order
distortion terms.
Ordering Information
PART NUMBER
TEMP.
(BRAND)
RANGE (°C)
PACKAGE
PKG.
DWG. #
HFA3101B
(H3101B)
-40 to 85 8 Ld SOIC
M8.15
HFA3101BZ
(H3101B) (Note)
-40 to 85 8 Ld SOIC
(Pb-free)
M8.15
HFA3101B96
(H3101B)
-40 to 85 8 Ld SOIC Tape M8.15
and Reel
HFA3101BZ96
-40 to 85 8 Ld SOIC Tape M8.15
(H3101B) (Note)
and Reel (Pb-free)
www.DataSheet4U.com
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020C.
Pinout
HFA3101
(SOIC)
TOP VIEW
Features
• Pb-free Available as an Option
• High Gain Bandwidth Product (fT) . . . . . . . . . . . . . 10GHz
• High Power Gain Bandwidth Product . . . . . . . . . . . . 5GHz
• Current Gain (hFE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
• Low Noise Figure (Transistor) . . . . . . . . . . . . . . . . . 3.5dB
• Excellent hFE and VBE Matching
• Low Collector Leakage Current . . . . . . . . . . . . . . <0.01nA
• Pin to Pin Compatible to UPA101
Applications
• Balanced Mixers
• Multipliers
• Demodulators/Modulators
• Automatic Gain Control Circuits
• Phase Detectors
• Fiber Optic Signal Processing
• Wireless Communication Systems
• Wide Band Amplification Stages
• Radio and Satellite Communications
• High Performance Instrumentation
Q1 Q2
Q5
Q3 Q4
Q6
NOTE: Q5 and Q6 - 2 Paralleled 3µm x 50µm Transistors
Q1, Q2, Q3, Q4 - Single 3µm x 50µm Transistors
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 1998, 2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
HFA3101
Application Information
The HFA3101 array is a very versatile RF Building block. It
has been carefully laid out to improve its matching
properties, bringing the distortion due to area mismatches,
thermal distribution, betas and ohmic resistances to a
minimum.
The cell is equivalent to two differential stages built as two
“variable transconductance multipliers” in parallel, with their
outputs cross coupled. This configuration is well known in
the industry as a Gilbert Cell which enables a four quadrant
multiplication operation.
Due to the input dynamic range restrictions for the input
levels at the upper quad transistors and lower tail transistors,
the HFA3101 cell has restricted use as a linear four quadrant
multiplier. However, its configuration is well suited for uses
where its linear response is limited to one of the inputs only,
as in modulators or mixer circuit applications. Examples of
these circuits are up converters, down converters, frequency
doublers and frequency/phase detectors.
Although linearization is still an issue for the lower pair input,
emitter degeneration can be used to improve the dynamic
range and consequent linearity. The HFA3101 has the lower
pair emitters brought to external pins for this purpose.
In modulators applications, the upper quad transistors are
used in a switching mode where the pairs Q1/Q2 and Q3/Q4
act as non saturating high speed switches. These switches
are controlled by the signal often referred as the carrier
input. The signal driving the lower pair Q5/Q6 is commonly
used as the modulating input. This signal can be linearly
transferred to the output by either the use of low signal levels
(Well below the thermal voltage of 26mV) or by the use of
emitter degeneration. The chopped waveform appearing at
the output of the upper pair (Q1 to Q4) resembles a signal
that is multiplied by +1 or -1 at every half cycle of the
switching waveform.
CARRIER SIGNAL
+1
Figure 1 shows the typical input waveforms where the
frequency of the carrier is higher than the modulating signal.
The output waveform shows a typical suppressed carrier
output of an up converter or an AM signal generator.
Carrier suppression capability is a property of the well known
Balanced modulator in which the output must be zero when
one or the other input (carrier or modulating signal) is equal
to zero. however, at very high frequencies, high frequency
mismatches and AC offsets are always present and the
suppression capability is often degraded causing carrier and
modulating feedthrough to be present.
Being a frequency translation circuit, the balanced modulator
has the properties of translating the modulating frequency
(ωM) to the carrier frequency (ωC), generating the two side
bands ωU = ωC + ωM and ωL = ωC - ωM. Figure 2 shows
some translating schemes being used by balanced mixers.
ωC - ωM
ωC + ωM
ωC
FIGURE 2A. UP CONVERSION OR SUPPRESSED CARRIER AM
IF (ωC - ωM)
FOLDED BACK
ωM
ωC
-1
MODULATING SIGNAL
DIFFERENTIAL OUTPUT
FIGURE 2B. DOWN CONVERSION
BASEBAND
ωC
ωM
FIGURE 1. TYPICAL MODULATOR SIGNALS
3-5
FIGURE 2C. ZERO IF OR DIRECT DOWN CONVERSION
FIGURE 2. MODULATOR FREQUENCY SPECTRUM
5 Page 
HFA3101
Typical Performance Curves for Transistors
70
60
50
40
30
20
10
0
0
IB = 1mA
IB = 800µA
IB = 600µA
IB = 400µA
IB = 200µA
2.0 4.0
VCE (V)
FIGURE 14. IC vs VCE
6.0
140
VCE = 5V
120
100
80
60
40
20
0
10-10
10-8
10-6
10-4
IC (A)
10-2
100
FIGURE 15. HFE vs IC
100
10-2
VCE = 3V
10-4
10-6
10-8
10-10
10-12
0.20
0.40
0.60
VBE (V)
0.80
FIGURE 16. GUMMEL PLOT
1.0
12
10
8
6
4
2
0
10-4
10-3
10-2
IC (A)
FIGURE 17. fT vs IC
10-1
4.8
4.6
4.4
4.2
4.0
3.8
3.6
3.4
3.2
0
20
18
16
14
12
10
8
6
4
0.5 1.0 1.5 2.0 2.5 3.0
FREQUENCY (GHz)
FIGURE 18. GAIN AND NOISE FIGURE vs FREQUENCY
NOTE: Figures 14 through 18 are only for Q5 and Q6.
3-11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet HFA3101.PDF ] | |
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