|
|
PDF ISL9212A Data sheet ( Hoja de datos )
| Número de pieza | ISL9212A | |
| Descripción | Charging System Safety Circuit | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de ISL9212A (archivo pdf) en la parte inferior de esta página. Total 11 Páginas | ||
|
No Preview Available !
®
Data Sheet
November 14, 2006
ISL9212A
FN6384.0
Charging System Safety Circuit
The ISL9212A is an integrated circuit (IC) optimized to
provide a Li-ion battery redundant safety protection from
failures of a charging system. The IC monitors the input
voltage, the battery voltage, and the charge current. When
any of the three parameters exceeds its limit, the IC turns off
an internal P-channel MOSFET to remove the power from
the charging system. In addition to the above protected
parameters, the IC also monitors its own internal
temperature and turns off the P-channel MOSFET when the
die temperature exceeds +140°C. Together with the battery
charger IC and the protection module in a battery pack, the
charging system using the ISL9212A has triple-level
protection and is two-fault tolerant.
The IC is designed to turn on the internal PFET slowly to
avoid inrush current at power-up but will turn off the PFET
quickly when input overvoltage is detected, in order to remove
the power before any damage occurs. The ISL9212A has a
logic warning output to indicate the fault and an enable input
to allow the system to remove the input power.
Ordering Information
PART
NUMBER
TEMP.
PART RANGE
MARKING (°C)
PACKAGE
PKG.
DWG. #
ISL9212AIRZ* 2AZ
(Note)
-40 to +85 12 Ld 4x3 TDFN L12.4x3A
(Pb-free)
ISL9200EVAL1 ISL9200 Evaluation Board
*Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
Typical Application Circuit
INPUT
C1
VIN
OUT
ISL6292
BATTERY
CHARGER
RILIM
ISL9212A
ILIM
VB
EN
GND
WRN
RVB
+
BATTERY
PACK
Features
• Fully Integrated Protection Circuit for Three Protection
Variables
- User Programmable Overcurrent Protection Threshold
- Input Overvoltage Protection in Less Than 1µs
- Battery Overvoltage Protection
• High Immunity of False Triggering Under Transients
• High Accuracy Protection Thresholds
• Warning Output to Indicate the Occurrence of Faults
• Enable Input
• Thermal Enhanced DFN Package
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Cell Phones
• Digital Still Cameras
• PDAs and Smart Phones
• Portable Instruments
• Desktop Chargers
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Technical Brief TB379 “Thermal Characterization of
Packaged Semiconductor Devices”
• Technical Brief TB389 “PCB Land Pattern Design and
Surface Mount Guidelines for QFN Packages”
Pinout
ISL9212A
(12 LD 4x3 DFN)
TOP VIEW
VIN 1
VIN 2
GND 3
WRN 4
NC 5
NC 6
EPAD
12 NC
11 OUT
10 OUT
9 ILIM
8 VB
7 EN
NOTE: EPAD must be electrically connected to the GND pin.
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2006. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL9212A
Typical Operating Performance The test conditions for the Typical Operating Performance are: VIN = 5V, TA = +25°C,
RILIM = 25.5kΩ, RVB = 200kΩ, Unless Otherwise Noted. (Continued)
Time: 200ms/div
VIN (1V/div)
Time: 10ms/div
VIN (1V/div)
OUT (1V/div)
Load Current
(500mA/div)
WRN (5V/div)
Load Current
(500mA/div)
OUT (1V/div)
WRN (5V/div)
FIGURE 8. POWER-UP WAVEFORMS WHEN OUTPUT IS
SHORT-CIRCUITED
1200
1000
800
ENABLE
600
400
200
DISABLED
0
0 10 20 30 40
INPUT VOLTAGE (V)
FIGURE 10. INPUT BIAS CURRENT vs INPUT VOLTAGE
WHEN ENABLED AND DISABLED
FIGURE 9. ZOOMED-IN VIEW OF FIGURE 8 (BLUE: LOAD
CURRENT; PINK: OUT PIN VOLTAGE)
1000
900
800 8.15V/ENABLED
4.30V/ENABLED
700 5.00V/ENABLED
600
30.00V/ENABLED
500
400
30.00V/DISABLED
300
200 8.15V/DISABLED
5.00V/DISABLED 4.30V/DISABLED
100
0
-50 -20 10 40 70 100 130
TEMPERATURE (°C)
FIGURE 11. INPUT BIAS CURRENT AT DIFFERENT INPUT
VOLTAGES WHEN ENABLED AND DISABLED
2.6
2.58
2.56
RISING THRESHOLD
2.54
2.52
2.5 FALLING THRESHOLD
2.48
2.46
-50 -20
10
40
70 100
TEMPERATURE (°C)
FIGURE 12. VPOR vs TEMPERATURE
130
5
8.52
8.50
8.48
8.46
8.44
8.42
RISING
THRESHOLD
8.40
8.38
8.36
8.34
FALLING
THRESHOLD
8.32
8.30
-50
-20 10 40 70
TEMPERATURE (°C)
100
FIGURE 13. INPUT OVERVOLTAGE PROTECTION
THRESHOLDS vs TEMPERATURE
130
FN6384.0
November 14, 2006
5 Page 
ISL9212A
Thin Dual Flat No-Lead Plastic Package (TDFN)
2X
0.15 C A
AD
2X
0.15 C B
6
INDEX
AREA
TOP VIEW
E
B
C SIDE VIEW
SEATING
PLANE
(DATUM B)
6
INDEX
AREA
(DATUM A)
D2
D2/2
12
// 0.10 C
A
0.08 C
A3
78
NX k
E2
E2/2
NX L
8
N N-1
e
(Nd-1)Xe
REF.
BOTTOM VIEW
NX (b)
5
(A1)
SECTION "C-C" TERMINAL TIP
NX b
5
0.10 M C A B
CL
L
e
FOR EVEN TERMINAL/SIDE
L12.4x3A
12 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE
(COMPLIANT TO JEDEC MO-229-WGED-4 ISSUE C)
MILLIMETERS
SYMBOL
MIN NOMINAL MAX
NOTES
A 0.70 0.75 0.80
-
A1
-
- 0.05
-
A3 0.20 REF -
b 0.18 0.23 0.30
5,8
D
4.00 BSC
-
D2 3.15 3.30 3.40
7,8
E
3.00 BSC
-
E2 1.55 1.70 1.80
7,8
e
0.50 BSC
-
k 0.20 - - -
L 0.30 0.40 0.50
8
N 12 2
Nd 6 3
NOTES:
Rev. 0 1/06
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd refers to the number of terminals on D.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensions are provided to assist with PCB Land
Pattern Design efforts, see Intersil Technical Brief TB389.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
11 FN6384.0
November 14, 2006
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet ISL9212A.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| ISL9212 | Charging System Safety Circuit | Intersil Corporation |
| ISL9212A | Charging System Safety Circuit | Intersil Corporation |
| ISL9212B | Charging System Safety Circuit | Intersil Corporation |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |