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XX1001-BD 데이터시트 PDF




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부품번호 XX1001-BD 기능
기능 GaAs MMIC Doubler and Power Amplifier
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XX1001-BD 데이터시트, 핀배열, 회로
18.0-21.0/36.0-42.0 GHz GaAs MMIC
Doubler and Power Amplifier
January 2007 - Rev 26-Jan-07
X1001-BD
Features
Integrated Doubler and Power Amplifier
Excellent Saturated Output Stage
+26.0 dBm Output Power
50.0 dBc Fundamental Suppression
100% On-Wafer RF, DC and Output Power Testing
100% Visual Inspection to MIL-STD-883
Method 2010
Chip Device Layout
General Description
Mimix Broadband's 18.0-21.0/36.0-42.0 GHz GaAs MMIC
doubler integrates a doubler and 4-stage power amplifier.
The device provides better than +26.0 dBm output power
and has excellent fundamental rejection.This MMIC uses
Mimix Broadband’s 0.15 µm GaAs PHEMT device model
technology, and is based upon electron beam lithography
to ensure high repeatability and uniformity.The chip has
surface passivation to protect and provide a rugged part
with backside via holes and gold metallization to allow
either a conductive epoxy or eutectic solder die attach
process.This device is well suited for Millimeter-wave
Point-to-Point Radio, LMDS, SATCOM and VSAT applications.
Absolute Maximum Ratings
Supply Voltage (Vd)
+6.0 VDC
Supply Current (Id)
800 mA
Gate Bias Voltage (Vg)
+0.3 VDC
Input Power (RF Pin)
TBD
Storage Temperature (Tstg) -65 to +165 OC
Operating Temperature (Ta) -55 to MTTF Table1
Channel Temperature (Tch) MTTF Table1
(1) Channel temperature affects a device's MTTF. It is
recommended to keep channel temperature as low as
possible for maximum life.
o
Electrical Characteristics (Ambient Temperature T = 25 C)
Parameter
Units Min. Typ. Max.
Input Frequency Range (fin)
GHz 18.0 - 21.0
Output Frequency Range (fout)
GHz 36.0 - 42.0
Input Return Loss (S11)
dB - TBD -
Output Return Loss (S22)
dB - 12.0 -
Fundamental Rejection
dBc - 50.0 -
RF Input Power (RF Pin)
dBm - 0.0 -
Output Power at 0.0 dBm Pin (Pout)
dBm - +26.0 -
Drain Supply Voltage (Vd1) Doubler
V - 2.5 3.0
Drain Supply Voltage (Vd2) Buffer Amp
V - 3.0 4.0
Drain Supply Voltage (Vd3,4,5,6) PA
V - 4.5 5.5
Gate Supply Voltage (Vg1) Doubler
V - -1.2 -
Drain Supply Current (Id1) Doubler
mA - <1.0 -
Drain Supply Current (Id2) Buffer
mA - 20 25
Drain Supply Current (Id3,4,5,6) (Vg=-0.7V Typical) PA
mA
-
530 600
Mimix Broadband, Inc., 10795 Rockley Rd., Houston, Texas 77099
Tel: 281.988.4600 Fax: 281.988.4615 mimixbroadband.com
Page 1 of 6
Characteristic Data and Specifications are subject to change without notice. ©2007 Mimix Broadband, Inc.
Export of this item may require appropriate export licensing from the U.S. Government. In purchasing these parts, U.S. Domestic customers accept
their obligation to be compliant with U.S. Export Laws.




XX1001-BD pdf, 반도체, 판매, 대치품
18.0-21.0/36.0-42.0 GHz GaAs MMIC
Doubler and Power Amplifier
January 2007 - Rev 26-Jan-07
X1001-BD
App Note [1] Biasing - It is recommended to separately bias each amplifier stage Vd1 through Vd6 at Vd1=2.5V, Vd2=3.0V, Vd(3,4,5,6)=4.5V with
Id1<1mA, Id2=20mA, Id3=40mA, Id4=70mA, Id5=150mA, Id6=270mA. Separate biasing is recommended if the amplifier is to be used at high levels
of saturation, where gate rectification will alter the effective gate control voltage. As shown in the bonding diagram, it is possible to parallel stages
Vd(3,4,5) with Id(3,4,5)=260mA while maintaining satisfactory performance. For non-critical applications it is possible to parallel stages Vd(3,4,5,6)
together and adjust the common gate voltage Vg(3,4,5,6) for total drain current Id(total)=530mA. It is also recommended to use active biasing to
keep the currents constant as the RF power and temperature vary; this gives the most reproducible results. Depending on the supply voltage
available and the power dissipation constraints, the bias circuit may be a single transistor or a low power operational amplifier, with a low value
resistor in series with the drain supply used to sense the current.The gate of the pHEMT is controlled to maintain correct drain current and thus
drain voltage. The typical gate voltage needed to do this is -0.7V.Typically the gate is protected with Silicon diodes to limit the applied voltage. Also,
make sure to sequence the applied voltage to ensure negative gate bias is available before applying the positive drain supply.
App Note [2] Bias Arrangement -
For Parallel Stage Bias (Recommended for general applications) -- The same as Individual Stage Bias but all the drain pad DC bypass capacitors
(~100-200 pF) can be combined. Additional DC bypass capacitance (~0.01 uF) is also recommended to all DC or combination (if gate or drains are
tied together) of DC bias pads. Vd(3,4,5,6) or Vg(3,4,5,6) have been tied together but can be left open.
For Individual Stage Bias (Recommended for saturated applications) -- Each DC pad (Vd1,2,3,4,5,6 and Vg1,2,3,4,5,6) needs to have DC bypass
capacitance (~100-200 pF) as close to the device as possible. Additional DC bypass capacitance (~0.01 uF) is also recommended.
MTTF
MTTF is calculated from accelerated life-time data of single devices and assumes an isothermal back-plate.
1.0E+05
XX1001-BD, MTTF (yrs) vs. Backplate Temperature (°C)
1.0E+04
1.0E+03
1.0E+02
1.0E+01
1.0E+00
55
65 75 85
Temperature (°C)
95
Mimix Broadband, Inc., 10795 Rockley Rd., Houston, Texas 77099
Tel: 281.988.4600 Fax: 281.988.4615 mimixbroadband.com
Page 4 of 6
Characteristic Data and Specifications are subject to change without notice. ©2007 Mimix Broadband, Inc.
Export of this item may require appropriate export licensing from the U.S. Government. In purchasing these parts, U.S. Domestic customers accept
their obligation to be compliant with U.S. Export Laws.

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XX1001-BD

GaAs MMIC Doubler and Power Amplifier

Mimix Broadband
Mimix Broadband

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