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X4325 데이터시트 PDF




Intersil Corporation에서 제조한 전자 부품 X4325은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 X4325 자료 제공

부품번호 X4325 기능
기능 (X4323 / X4325) CPU Supervisor
제조업체 Intersil Corporation
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X4325 데이터시트, 핀배열, 회로
®
Data Sheet
X4323, X4325
32k, 4k x 8 Bit
May 25, 2006
FN8122.1
CPU Supervisor with 32k EEPROM
FEATURES
• Selectable watchdog timer
• Low VCC detection and reset assertion
—Four standard reset threshold voltages
—Adjust low VCC reset threshold voltage using
special programming sequence
—Reset signal valid to VCC = 1V
• Low power CMOS
—<20µA max standby current, watchdog on
—<1µA standby current, watchdog off
—3mA active current
• 32Kbits of EEPROM
—64-byte page write mode
—Self-timed write cycle
—5ms write cycle time (typical)
• Built-in inadvertent write protection
—Power-up/power-down protection circuitry
—Block Lock (1, 2, 4, 8 pages, all, none)
• 400kHz 2-wire interface
• 2.7V to 5.5V power supply operation
• Available packages
— 8 Ld SOICwww.DataSheet4U.com
—8 Ld TSSOP
• Pb-free plus anneal available (RoHS compliant)
BLOCK DIAGRAM
DESCRIPTION
The X4323, X4325 combines four popular functions,
Power-on Reset Control, Watchdog Timer, Supply Volt-
age Supervision, and Serial EEPROM Memory in one
package. This combination lowers system cost,
reduces board space requirements, and increases
reliability.
Applying power to the device activates the power-on
reset circuit which holds RESET/RESET active for a
period of time. This allows the power supply and oscilla-
tor to stabilize before the processor can execute code.
The Watchdog Timer provides an independent protec-
tion mechanism for microcontrollers. When the micro-
controller fails to restart a timer within a selectable time
out interval, the device activates the RESET/RESET
signal. The user selects the interval from three preset
values. Once selected, the interval does not change,
even after cycling the power.
The device’s low VCC detection circuitry protects the
user’s system from low voltage conditions, resetting the
system when VCC falls below the set minimum VCC trip
point. RESET/RESET is asserted until VCC returns to
proper operating level and stabilizes. Four industry
standard VTRIP thresholds are available, however, Inter-
sil’s unique circuits allow the threshold to be repro-
grammed to meet custom requirements or to fine-tune
the threshold for applications requiring higher precision.
WP
SDA
SCL
S0
S1
VCC
Watchdog Transition
Detector
Protect Logic
Data
Register
Command
Decode &
Control
Logic
VCC Threshold
Reset logic
Status
Register
EEPROM Array
VTRIP
+
-
Watchdog
Timer Reset
Reset &
Watchdog
Timebase
Power-on and
Low Voltage
Reset
Generation
RESET (X4323)
RESET (X4325)
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.




X4325 pdf, 반도체, 판매, 대치품
X4323, X4325
Ordering Information (Continued)
PART NUMBER
RESET
(ACTIVE LOW)
PART
MARKING
PART NUMBER
RESET
PART VCC RANGE VTRIP RANGE TEMP.
(ACTIVE HIGH) MARKING
(V)
(V) RANGE (°C)
PACKAGE
PKG.
DWG. #
X4323V8-4.5A 4323 AL
X4325V8-4.5A 4325 AL
4.5 to 5.5 4.5 to 4.75
0 to 70 8 Ld TSSOP (4.4mm) M8.173
X4323V8Z-4.5A 4323 ALZ
(Note)
X4325V8Z-4.5A 4325 ALZ
(Note)
0 to 70 8 Ld TSSOP (4.4mm) M8.173
(Pb-free)
X4323V8I-4.5A 4323 AM
X4325V8I-4.5A 4325 AM
-40 to 85 8 Ld TSSOP (4.4mm) M8.173
X4323V8IZ-4.5A 4323 AMZ
(Note)
X4325V8IZ-4.5A 4325 AMZ
(Note)
-40 to 85 8 Ld TSSOP (4.4mm) M8.173
(Pb-free)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
4 FN8122.1
May 25, 2006

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X4325 전자부품, 판매, 대치품
Figure 4. VTRIP Programming Sequence
X4323, X4325
VTRIP Programming
Execute
RSeesqeut eVnTcReIP
Set VCC = VCC Applied =
Desired VTRIP
New VCC Applied =
Old VCC Applied + Error
Execute
SSeeqt uVeTnRcIPe
Apply 5V to VCC
Decrement VCC
(VCC = VCC - 50mV)
New VCC Applied =
Old VCC Applied - Error
Execute
Reset VTRIP
Sequence
NO RESET pin
goes active?
YES
Error –Emax
Emax = Maximum Allowed VTRIP Error
Measured VTRIP -
Desired VTRIP
Error Emax
–Emax < Error < Emax
DONE
Control Register
The Control Register provides the user a mechanism
for changing the Block Lock and Watchdog Timer set-
tings. The Block Lock and Watchdog Timer bits are
nonvolatile and do not change when power is
removed.
The Control Register is accessed at address FFFFh. It
can only be modified by performing a byte write opera-
tion directly to the address of the register and only one
data byte is allowed for each register write operation.
Prior to writing to the Control Register, the WEL and
RWEL bits must be set using a two step process, with
the whole sequence requiring 3 steps. See "Writing to
the Control Register" on page 9.
The user must issue a stop after sending this byte to
the register to initiate the nonvolatile cycle that stores
WD1, and WD0. The X4323, X4325 will not acknowl-
edge any data bytes written after the first byte is
entered.
7 FN8122.1
May 25, 2006

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관련 데이터시트

부품번호상세설명 및 기능제조사
X4323

(X4323 / X4325) CPU Supervisor

Intersil Corporation
Intersil Corporation
X4325

(X4323 / X4325) CPU Supervisor

Intersil Corporation
Intersil Corporation

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