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Número de pieza | STA518 | |
Descripción | 40V 3.5A quad power half bridge | |
Fabricantes | STMicroelectronics | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de STA518 (archivo pdf) en la parte inferior de esta página. Total 19 Páginas | ||
No Preview Available ! STA518
40V 3.5A quad power half bridge
Feature
■ Multipower BCD technology
■ Minimum input output pulse width distortion
■ 200mΩ RdsON complementary dmos output
stage
■ CMOS compatible logic inputs
■ Thermal protection
■ Thermal warning output
■ Under voltage protection
■ Short circuit protection
Description
STA518 is a monolithic quad half bridge stage in
Multipower BCD Technology. The device can be
used also as dual bridge or reconfigured, by
connecting CONFIG pin to Vdd pin, as single
bridge with double current capability.
Order codes
Part number
STA518
STA51813TR
Temp range, °C
-40 to 90
-40 to 90
PSSO36 (slug up)
The device is particularly designed to make the
output stage of a stereo All-Digital High Efficiency
(DDX™) amplifier capable to deliver an output
power of 24W x 4 channels @ THD = 10% at Vcc
30V on 4W load in single ended configuration.
It can also deliver 50 + 50W @ THD = 10% at Vcc
29V as output power on 8W load in BTL
configuration and 70W @ THD = 10% at Vcc 34V
on 8W in single paralleled BTL configuration.
The input pins have threshold proportional to VL
pin voltage.
Package
PowerSSO36 (slug up)
PowerSSO36 (slug up)
Packing
Tube
Tape & reel
May 2006
Rev 3
1/19
www.st.com
1
1 page STA518
1 Audio application circuit
Figure 1. Audio application circuit ( Quad single ended)
Audio application circuit
5/19
5 Page STA518
Electrical specifications
Figure 3. Low current dead time for Single End application: test circuit.
Low current dead time = MAX(DTr,DTf)
Duty cycle = 50%
INxY
+Vcc
M58
OUTxY
M57
gnd
OUTxY
Vcc
(3/4)Vcc
(1/2)Vcc
(1/4)Vcc
t
DTr DTf
R 8Ω
+
-
V67 =
vdc = Vcc/2
D03AU1458
Figure 4. High current dead time for Bridge application: block diagram
+VCC
INxA
Q1
OUTxA
Q2
OUTxB
Q3 Q4
GND
D00AU1134
INxB
Figure 5. High current dead time for Bridge application: test circuit
High Current Dead time for Bridge application = ABS(DTout(A)-DTin(A))+ABS(DTOUT(B)-DTin(B))
+VCC
Duty cycle=A
DTin(A)
INA
DTout(A)
M58
Q1
Q2 M64
OUTA
Rload=8Ω
DTout(B)
OUTB
L67 22µ
Iout=4A
L68 22µ
Iout=4A
M57
Q3
C69
470nF
C71 470nF
C70
470nF
Q4 M63
Duty cycle=B
DTin(B)
INB
Duty cycle A and B: Fixed to have DC output current of 4A in the direction shown in figure
D03AU1517
11/19
11 Page |
Páginas | Total 19 Páginas | |
PDF Descargar | [ Datasheet STA518.PDF ] |
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