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부품번호 DAC082S085 기능
기능 8-Bit Micro Power DUAL Digital-to-Analog Converter
제조업체 National Semiconductor
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DAC082S085 데이터시트, 핀배열, 회로
January 2007
DAC082S085
8-Bit Micro Power DUAL Digital-to-Analog Converter with
Rail-to-Rail Output
General Description
The DAC082S085 is a full-featured, general purpose DUAL
8-bit voltage-output digital-to-analog converter (DAC) that
can operate from a single +2.7V to 5.5V supply and consumes
0.6 mW at 3V and 1.6 mW at 5V. The DAC082S085 is pack-
aged in 10-lead LLP and MSOP packages. The 10-lead LLP
package makes the DAC082S085 the smallest DUAL DAC in
its class. The on-chip output amplifier allows rail-to-rail output
swing and the three wire serial interface operates at clock
rates up to 40 MHz over the entire supply voltage range.
Competitive devices are limited to 25 MHz clock rates at sup-
ply voltages in the 2.7V to 3.6V range. The serial interface is
compatible with standard SPI, QSPI, MICROWIRE and
DSP interfaces.
The reference for the DAC082S085 serves both channels and
can vary in voltage between 1V and VA, providing the widest
possible output dynamic range. The DAC082S085 has a 16-
bit input shift register that controls the outputs to be updated,
the mode of operation, the powerdown condition, and the bi-
nary input data. Both outputs can be updated simultaneously
or individually depending on the setting of the two mode of
operation bits.
A power-on reset circuit ensures that the DAC output powers
up to zero volts and remains there until there is a valid write
to the device. A power-down feature reduces power con-
sumption to less than a microWatt with three different termi-
nation options.
The low power consumption and small packages of the
DAC082S085 make it an excellent choice for use in battery
operated equipment.
The DAC082S085 is one of a family of pin compatible DACs,
including the 10-bit DAC102S085 and the 12-bit
DAC124S085. The DAC082S085 operates over the extended
industrial temperature range of −40°C to +105°C.
Features
Guaranteed Monotonicity
Low Power Operation
Rail-to-Rail Voltage Output
Power-on Reset to 0V
Simultaneous Output Updating
Wide power supply range (+2.7V to +5.5V)
Industry's Smallest Package
Power Down Modes
Key Specifications
Resolution
INL
DNL
Settling Time
Zero Code Error
Full-Scale Error
Supply Power
Normal
Power Down
8 bits
±0.5 LSB (max)
+0.18 / −0.13 LSB (max)
4.5 µs (max)
+15 mV (max)
−0.75 %FS (max)
0.6 mW (3V) / 1.6 mW (5V) typ
0.3 µW (3V) / 0.8 µW (5V) typ
Applications
Battery-Powered Instruments
Digital Gain and Offset Adjustment
Programmable Voltage & Current Sources
Programmable Attenuators
Pin Configuration
20195601
SPIis a trademark of Motorola, Inc.
© 2007 National Semiconductor Corporation
201956
20195602
www.national.com




DAC082S085 pdf, 반도체, 판매, 대치품
Absolute Maximum Ratings (Notes 1, 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage, VA
Voltage on any Input Pin
Input Current at Any Pin (Note 3)
Package Input Current (Note 3)
Power Consumption at TA = 25°C
ESD Susceptibility (Note 5)
Human Body Model
Machine Model
Junction Temperature
Storage Temperature
6.5V
−0.3V to 6.5V
10 mA
20 mA
See (Note 4)
2500V
250V
+150°C
−65°C to +150°C
Operating Ratings (Notes 1, 2)
Operating Temperature Range
Supply Voltage, VA
Reference Voltage, VREFIN
Digital Input Voltage (Note 7)
Output Load
SCLK Frequency
−40°C TA +105°C
+2.7V to 5.5V
+1.0V to VA
0.0V to 5.5V
0 to 1500 pF
Up to 40 MHz
Package Thermal Resistances
Package
10-Lead MSOP
θJA
240°C/W
10-Lead LLP
250°C/W
Soldering process must comply with National
Semiconductor's Reflow Temperature Profile specifications.
Refer to www.national.com/packaging. (Note 6)
Electrical Characteristics
The following specifications apply for VA = +2.7V to +5.5V, VREFIN = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 3
to 252. Boldface limits apply for TMIN TA TMAX and all other limits are at TA = 25°C, unless otherwise specified.
Symbol
Parameter
Conditions
Typical
(Note 9)
Limits
(Note 9)
Units
(Limits)
STATIC PERFORMANCE
Resolution
8 Bits (min)
Monotonicity
8 Bits (min)
INL Integral Non-Linearity
±0.14
±0.5
LSB (max)
DNL Differential Non-Linearity
VA = 2.7V to 5.5V
+0.04
−0.02
+0.18
−0.13
LSB (max)
LSB (min)
ZE
FSE
GE
Zero Code Error
Full-Scale Error
Gain Error
IOUT = 0
IOUT = 0
All ones Loaded to DAC register
+4
−0.1
−0.2
+15
−0.75
−1.0
mV (max)
%FSR (max)
%FSR
ZCED Zero Code Error Drift
−20 µV/°C
TC GE Gain Error Tempco
OUTPUT CHARACTERISTICS
VA = 3V
VA = 5V
−0.7
−1.0
ppm/°C
ppm/°C
Output Voltage Range
(Note 10)
IOZ
High-Impedance Output Leakage
Current (Note 10)
0
VREFIN
±1
V (min)
V (max)
µA (max)
ZCO Zero Code Output
FSO Full Scale Output
IOS
Output Short Circuit Current
(source)
VA = 3V, IOUT = 200 µA
VA = 3V, IOUT = 1 mA
VA = 5V, IOUT = 200 µA
VA = 5V, IOUT = 1 mA
VA = 3V, IOUT = 200 µA
VA = 3V, IOUT = 1 mA
VA = 5V, IOUT = 200 µA
VA = 5V, IOUT = 1 mA
VA = 3V, VOUT = 0V,
Input Code = FFh
VA = 5V, VOUT = 0V,
Input Code = FFh
1.3
6.0
7.0
10.0
2.984
2.934
4.989
4.958
-56
-69
mV
mV
mV
mV
V
V
V
V
mA
mA
www.national.com
4

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DAC082S085 전자부품, 판매, 대치품
Note 9: Typical figures are at TJ = 25°C, and represent most likely parametric norms. Test limits are guaranteed to National's AOQL (Average Outgoing Quality
Level).
Note 10: This parameter is guaranteed by design and/or characterization and is not tested in production.
Specification Definitions
LSB = VREF / 2n
DIFFERENTIAL NON-LINEARITY (DNL) is the measure of
the maximum deviation from the ideal step size of 1 LSB,
which is VREF / 256 = VA / 256.
DAC-to-DAC CROSSTALK is the glitch impulse transferred
to a DAC output in response to a full-scale change in the out-
put of another DAC.
DIGITAL CROSSTALK is the glitch impulse transferred to a
DAC output at mid-scale in response to a full-scale change in
the input register of another DAC.
DIGITAL FEEDTHROUGH is a measure of the energy inject-
ed into the analog output of the DAC from the digital inputs
when the DAC outputs are not updated. It is measured with a
full-scale code change on the data bus.
where VREF is the supply voltage for this product, and "n" is
the DAC resolution in bits, which is 8 for the DAC082S085.
MAXIMUM LOAD CAPACITANCE is the maximum capaci-
tance that can be driven by the DAC with output stability
maintained.
MONOTONICITY is the condition of being monotonic, where
the DAC has an output that never decreases when the input
code increases.
MOST SIGNIFICANT BIT (MSB) is the bit that has the largest
value or weight of all bits in a word. Its value is 1/2 of VA.
MULTIPLYING BANDWIDTH is the frequency at which the
output amplitude falls 3dB below the input sine wave on
VREFIN with a full-scale code loaded into the DAC.
FULL-SCALE ERROR is the difference between the actual
output voltage with a full scale code (FFFh) loaded into the
DAC and the value of VA x 255 / 256.
GAIN ERROR is the deviation from the ideal slope of the
transfer function. It can be calculated from Zero and Full-
Scale Errors as GE = FSE - ZE, where GE is Gain error, FSE
POWER EFFICIENCY is the ratio of the output current to the
total supply current. The output current comes from the power
supply. The difference between the supply and output cur-
rents is the power consumed by the device without a load.
SETTLING TIME is the time for the output to settle to within
1/2 LSB of the final value after the input code is updated.
is Full-Scale Error and ZE is Zero Error.
TOTAL HARMONIC DISTORTION (THD) is the measure of
GLITCH IMPULSE is the energy injected into the analog out-
put when the input code to the DAC register changes. It is
the harmonics present at the output of the DACs with an ideal
sine wave applied to VREFIN. THD is measured in dB.
specified as the area of the glitch in nanovolt-seconds.
WAKE-UP TIME is the time for the output to exit power-down
INTEGRAL NON-LINEARITY (INL) is a measure of the de-
viation of each individual code from a straight line through the
input to output transfer function. The deviation of any given
mode. This is the time from the falling edge of the 16th SCLK
pulse to when the output voltage deviates from the power-
down voltage of 0V.
code from this straight line is measured from the center of that
ZERO CODE ERROR is the output error, or voltage, present
code value. The end point method is used. INL for this product
at the DAC output after a code of 000h has been entered.
is specified over a limited range, per the Electrical Tables.
LEAST SIGNIFICANT BIT (LSB) is the bit that has the small-
est value or weight of all bits in a word. This value is
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