|
|
PDF X5163 Data sheet ( Hoja de datos )
| Número de pieza | X5163 | |
| Descripción | (X5163 / X5165) CPU Supervisor | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de X5163 (archivo pdf) en la parte inferior de esta página. Total 21 Páginas | ||
|
No Preview Available !
®
Data Sheet
X5163, X5165
June 1, 2006
FN8128.3
CPU Supervisor with 16Kbit SPI EEPROM
Description
These devices combine four popular functions, Power-on
Reset Control, Watchdog Timer, Supply Voltage Supervision,
and Block Lock Protect Serial EEPROM Memory in one
package. This combination lowers system cost, reduces
board space requirements, and increases reliability.
Applying power to the device activates the power-on reset
circuit which holds RESET/RESET active for a period of
time. This allows the power supply and oscillator to stabilize
before the processor can execute code.
The Watchdog Timer provides an independent protection
mechanism for microcontrollers. When the microcontroller
fails to restart a timer within a selectable time out interval, the
device activates the RESET/RESET signal. The user selects
the interval from three preset values. Once selected, the
interval does not change, even after cycling the power.
The device’s low VCC detection circuitry protects the user’s
system from low voltage conditions, resetting the system when
VCC falls below the minimum VCC trip point. RESET/RESET is
asserted
www.DataSheet4U.com
until
VCC
returns
to
proper
operating
level
and
stabilizes. Five industry standard VTRIP thresholds are
available, however, Intersil’s unique circuits allow the
threshold to be reprogrammed to meet custom requirements
or to fine-tune the threshold for applications requiring higher
precision.
Pinouts
CS/WDI
SO
WP
VSS
8 Ld SOIC/PDIP
X5163, X5165
18
27
3 X5163, X5165 6
45
VCC
RESET/RESET
SCK
SI
Features
• Selectable watchdog timer
• Low VCC detection and reset assertion
- Five standard reset threshold voltages
- Re-program low VCC reset threshold voltage using
special programming sequence
- Reset signal valid to VCC = 1V
• Determine watchdog or low voltage reset with a volatile
flag bit
• Long battery life with low power consumption
- <50µA max standby current, watchdog on
- <1µA max standby current, watchdog off
- <400µA max active current during read
• 16kbits of EEPROM
• Built-in inadvertent write protection
- Power-up/power-down protection circuitry
- Protect 0, 1/4, 1/2 or all of EEPROM array with Block
Lock™ protection
- In-circuit programmable ROM mode
• 2MHz SPI interface modes (0,0 & 1,1)
• Minimize EEPROM programming time
- 32-byte page write mode
- Self-timed write cycle
- 5ms write cycle time (typical)
• 2.7V to 5.5V and 4.5V to 5.5V power supply operation
• Available packages: 14 Ld TSSOP, 8 Ld SOIC, 8 Ld PDIP
• Pb-free plus anneal available (RoHS compliant)
CS/WDI
SO
NC
NC
NC
WP
VSS
14 Ld TSSOP
X5163, X5165
1 14
2 13
3 12
4 11
5 10
69
78
VCC
RESET/RESET
NC
NC
NC
SCK
SI
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
X5163, X5165
Principles Of Operation
Power-on Reset
Application of power to the X5163, X5165 activates a Power-
on Reset Circuit. This circuit goes active at 1V and pulls the
RESET/RESET pin active. This signal prevents the system
microprocessor from starting to operate with insufficient
voltage or prior to stabilization of the oscillator. When VCC
exceeds the device VTRIP value for 200ms (nominal) the
circuit releases RESET/RESET, allowing the processor to
begin executing code.
Low Voltage Monitoring
During operation, the X5163, X5165 monitors the VCC level
and asserts RESET/RESET if supply voltage falls below a
preset minimum VTRIP. The RESET/RESET signal prevents
the microprocessor from operating in a power fail or
brownout condition. The RESET/RESET signal remains
active until the voltage drops below 1V. It also remains active
until VCC returns and exceeds VTRIP for 200ms.
Watchdog Timer
The Watchdog Timer circuit monitors the microprocessor
activity by monitoring the WDI input. The microprocessor
must toggle the CS/WDI pin periodically to prevent a
RESET/RESET signal. The CS/WDI pin must be toggled
from HIGH to LOW prior to the expiration of the watchdog
time out period. The state of two nonvolatile control bits in
the Status Register determine the watchdog timer period.
The microprocessor can change these watchdog bits, or
they may be “locked” by tying the WP pin LOW and setting
the WPEN bit HIGH.
VCC Threshold Reset Procedure
The X5163, X5165 has a standard VCC threshold (VTRIP)
voltage. This value will not change over normal operating
and storage conditions. However, in applications where the
standard VTRIP is not exactly right, or for higher precision in
the VTRIP value, the X5163, X5165 threshold may be
adjusted.
Setting the VTRIP Voltage
This procedure sets the VTRIP to a higher voltage value. For
example, if the current VTRIP is 4.4V and the new VTRIP is
4.6V, this procedure directly makes the change. If the new
setting is lower than the current setting, then it is necessary
to reset the trip point before setting the new value.
To set the new VTRIP voltage, apply the desired VTRIP
threshold to the VCC pin and tie the CS/WDI pin and the WP
pin HIGH. RESET and SO pins are left unconnected. Then
apply the programming voltage VP to both SCK and SI and
pulse CS/WDI LOW then HIGH. Remove VP and the
sequence is complete.
CS
SCK
VP
VP
SI
FIGURE 1. SET VTRIP VOLTAGE
Resetting the VTRIP Voltage
This procedure sets the VTRIP to a “native” voltage level. For
example, if the current VTRIP is 4.4V and the VTRIP is reset,
the new VTRIP is something less than 1.7V. This procedure
must be used to set the voltage to a lower value.
To reset the VTRIP voltage, apply a voltage between 2.7 and
5.5V to the VCC pin. Tie the CS/WDI pin, the WP pin, AND
THE SCK pin HIGH. RESET and SO pins are left
unconnected. Then apply the programming voltage VP to the
SI pin ONLY and pulse CS/WDI LOW then HIGH. Remove VP
and the sequence is complete.
CS
SCK
VCC
VP
SI
FIGURE 2. RESET VTRIP VOLTAGE
5 FN8128.3
June 1, 2006
5 Page 
X5163, X5165
CS
SCK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
INSTRUCTION
DATA BYTE
SI 7 6 5 4 3 2 1 0
SO HIGH IMPEDANCE
FIGURE 9. STATUS REGISTER WRITE SEQUENCE
Symbol Table
WAVEFORM
INPUTS
MUST BE
STEADY
OUTPUTS
WILL BE
STEADY
MAY CHANGE WILL CHANGE
FROM LOW TO FROM LOW TO
HIGH
HIGH
MAY CHANGE WILL CHANGE
FROM HIGH TO FROM HIGH TO
LOW
LOW
DON’T CARE:
CHANGES
ALLOWED
CHANGING:
STATE NOT
KNOWN
N/A CENTER LINE
IS HIGH
IMPEDANCE
11 FN8128.3
June 1, 2006
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet X5163.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| X5163 | CPU Supervisor with 16Kbit SPI EEPROM |  Xicor |
| X5163 | (X5163 / X5165) CPU Supervisor | Intersil Corporation |
| X5163P | CPU Supervisor with 16Kbit SPI EEPROM | Xicor |
| X5163S8 | CPU Supervisor with 16Kbit SPI EEPROM | Xicor |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |