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부품번호 X95840 기능
기능 Quad Digital Controlled Potentiometers
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X95840 데이터시트, 핀배열, 회로
X95840
®
Quad Digital Controlled Potentiometers (XDCP™)
Data Sheet
July 5, 2006
FN8213.2
Low Noise/Low Power/I2C® Bus/256 Taps
The X95840 integrates four digitally controlled
potentiometers (XDCP) on a monolithic CMOS integrated
circuit.
The digitally controlled potentiometers are implemented with
a combination of resistor elements and CMOS switches. The
position of the wipers are controlled by the user through the
I2C bus interface. Each potentiometer has an associated
volatile Wiper Register (WR) and a non-volatile Initial Value
Register (IVR), that can be directly written to and read by the
user. The contents of the WR controls the position of the
wiper. At power up the device recalls the contents of the four
DCP’s IVR to the corresponding WRs.
The DCPs can be used as three-terminal potentiometers or
as two-terminal variable resistors in a wide variety of
applications including control, parameter adjustments, and
signal processing.
Ordering Information
PART NUMBER
PART
RESISTANCE
MARKING
OPTION
PACKAGE
www.DataSheet4U.comX95840WV20I-2.7* X95840WV G
X95840WV20IZ-2.7* X95840WV Z G
(Note)
10kΩ
10kΩ
20 Ld TSSOP
20 Ld TSSOP
(Pb-free)
X95840UV20I-2.7* X95840UV G
50kΩ 20 Ld TSSOP
X95840UV20IZ-2.7* X95840UV Z G
(Note)
50kΩ
20 Ld TSSOP
(Pb-free)
*Add “T1” suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
Features
• Four Potentiometers in One Package
• 256 Resistor Taps-0.4% Resolution
• I2C Serial Interface
- Three address pins, up to eight devices/bus
• Wiper Resistance: 70Ω Typical @ 3.3V
• Non-Volatile Storage of Wiper Position
• Standby Current < 5µA Max
• Power Supply: 2.7V to 5.5V
• 50kΩ, 10kΩ Total Resistance
• High Reliability
- Endurance: 150,000 data changes per bit per register
- Register data retention: 50 years @ T 75°C
• 20 Ld TSSOP
• Pb-Free Plus Anneal Available (RoHS Compliant)
Pinouts
X95840
(20 LD TSSOP)
TOP VIEW
RH3
RL3
RW3
A2
SCL
SDA
GND
RW2
RL2
RH2
1
2
3
4
5
6
7
8
9
10
20 RW0
19 RL0
18 RH0
17 WP
16 VCC
15 A1
14 A0
13 RH1
12 RL1
11 RW1
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.




X95840 pdf, 반도체, 판매, 대치품
X95840
Operating Specifications Over the recommended operating conditions unless otherwise specified.
SYMBOL
ICC1
ICC2
ISB
ILkgDig
PARAMETER
TEST CONDITIONS
VCC Supply Current
(Volatile write/read)
fSCL = 400kHz; SDA = Open; (for I2C,
Active, Read and Volatile Write States only)
VCC Supply Current
(nonvolatile write)
fSCL = 400kHz; SDA = Open; (for I2C,
Active, Nonvolatile Write State only)
VCC Current (standby)
VCC = +5.5V, I2C Interface in Standby State
VCC = +3.6V, I2C Interface in Standby State
Leakage Current, at
Voltage at pin from GND to VCC
Pins A0, A1, A2, SDA, SCL,
and WP Pins
TYP
MIN (Note 1) MAX
1
UNITS
mA
3 mA
5 µA
2 µA
-10 10 µA
tDCP
DCP Wiper Response Time SCL falling edge of last bit of DCP Data Byte to wiper
(Note 15)
change
1 µs
Vpor
Power-on Recall Voltage
VccRamp VCC Ramp Rate
tD (Note 15) Power-up Delay
Minimum VCC at which memory recall occurs
VCC above
completed,
Vpor, to
and I2C
DCP Initial Value Register
Interface in standby state
recall
1.8
0.2
2.6 V
V/ms
3 ms
EEPROM SPECS
EEPROM Endurance
150,000
Cycles
EEPROM Retention
Temperature 75°C
50 Years
SERIAL INTERFACE SPECS
VIL WP, A2, A1, A0, SDA, and
SCL Input Buffer LOW
Voltage
-0.3
0.3*VCC
V
VIH WP, A2, A1, A0, SDA, and
SCL Input Buffer HIGH
Voltage
0.7*VCC
VCC+0.3
V
Hysteresis SDA and SCL Input Buffer
(Note 15) Hysteresis
VOL (Note 15) SDA outPut Buffer LOW
Voltage, Sinking 4mA
0.05*
VCC
0
V
0.4 V
Cpin
WP, A2, A1, A0, SDA, and
(Note 15) SCL Pin Capacitance
10 pF
fSCL
SCL frEquency
tIN (Note 15) Pulse Width Suppression Any pulse narrower than the max spec is suppressed.
Time at SDA and SCL Inputs
400 kHz
50 ns
tAA (Note 15) SCL Falling Edge to SDA
Output Data Valid
tBUF
(Note 15)
Time the Bus Must be Free
Before the Start of a New
Transmission
SCL falling edge crossing 30% of VCC, until SDA exits
the 30% to 70% of VCC window.
SDA crossing 70% of VCC during a STOP condition, to
SDA crossing 70% of VCC during the following START
condition.
1300
900 ns
ns
tLOW
tHIGH
tSU:STA
tHD:STA
Clock LOW Time
Measured at the 30% of VCC crossing.
Clock HIGH Time
Measured at the 70% of VCC crossing.
START Condition Setup
Time
SCL rising edge to SDA falling edge. Both crossing
70% of VCC.
START Condition Hold Time From SDA falling edge crossing 30% of VCC to SCL
falling edge crossing 70% of VCC.
1300
600
600
600
ns
ns
ns
ns
4 FN8213.2
July 5, 2006

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X95840 전자부품, 판매, 대치품
Typical Performance Curves
X95840
160
VCC = 2.7, T = 85°C
140 VCC = 2.7, T = -40°C
VCC = 2.7, T = 25°C
120
100
80
60
40
20
VCC = 5.5, T = -40°C
VCC = 5.5, T = 85°C
VCC = 5.5, T = 25°C
0
0 50 100 150 200 250
TAP POSITION (DECIMAL)
FIGURE 1. WIPER RESISTANCE vs TAP POSITION
[ I(RW) = VCC/RTOTAL ] FOR 50kΩ (U)
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
2.7
-40°C
85°C
25°C
3.2 3.7 4.2 4.7
VCC (V)
FIGURE 2. STANDBY ICC vs VCC
5.2
0.2
0.15
0.1
VCC = 5.5, T = -40°C
VCC = 2.7, T = 25°C
VCC = 2.7, T = -40°C
0.05
0
-0.05
-0.1 VCC = 5.5, T = 25°C
-0.15 VCC = 2.7, T = 85°C
VCC = 5.5, T = 85°C
-0.2
0
50 100 150 200
TAP POSITION (DECIMAL)
250
FIGURE 3. DNL vs TAP POSITION IN VOLTAGE DIVIDER
MODE FOR 10kΩ (W)
0.3
VCC = 2.7, T = -40°C
0.2 VCC = 5.5, T = -40°C
VCC = 5.5, T = 85°C
0.1
0
VCC = 2.7, T = 25°C
-0.1 VCC = 2.7, T = 85°C
VCC = 5.5, T = 25°C
-0.2
-0.3
0
50 100 150 200
TAP POSITION (DECIMAL)
250
FIGURE 4. INL vs TAP POSITION IN VOLTAGE DIVIDER
MODE FOR 10kΩ (W)
0.4
0.35
0.3
0.25
2.7V
0.2
0.15
-40
5.5V
-20 0
20 40 60
TEMPERATURE (°C)
FIGURE 5. ZSerror vs TEMPERATURE
80
7
0
-0.1
-0.2
-0.3
-0.4
-0.5
-0.6
-0.7
-0.8
-0.9
-1
-40
VCC = 5.5V
VCC = 2.7V
-20 0
20 40 60
TEMPERATURE (°C)
FIGURE 6. FSerror vs TEMPERATURE
80
FN8213.2
July 5, 2006

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부품번호상세설명 및 기능제조사
X95840

Quad Digital Controlled Potentiometers

Intersil Corporation
Intersil Corporation

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