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ZY1015 데이터시트 PDF




Power-One에서 제조한 전자 부품 ZY1015은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 ZY1015 기능
기능 No-Bus POL
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ZY1015 데이터시트, 핀배열, 회로
ZY1015 15A No-Bus POL Data Sheet
3V to 14V Input 0.5V to 5.5V Output
Member of the
Family
www.DataSheet4U.com
Applications
Low voltage, high density systems with
Intermediate Bus Architectures (IBA)
Point-of-load regulators for high performance DSP,
FPGA, ASIC, and microprocessor applications
Industrial computing, servers, and storage
Broadband, networking, optical, and wireless
communications systems
Active memory bus terminators
Benefits
Integrates digital power conversion with intelligent
power management
Eliminates the need for external power
management components and communication bus
Completely programmable via pin strapping and
external R and C
One part that covers all applications
Reduces board space, system cost and
complexity, and time to market
Features
RoHS lead free and lead-solder-exempt products are
available
Wide input voltage range: 3V–14V
High continuous output current: 15A
Wide programmable output voltage range: 0.5V–5.5V
Active digital current share
Output voltage margining
Overcurrent and overtemperature protections
Overvoltage and undervoltage protections, and Power
Good signal tracking the output voltage setpoint
Programmable power-up delay
Tracking during turn-on and turn-off with guaranteed
slew rates
Sequenced and cascaded modes of operation
Single-wire line for frequency synchronization
between multiple POLs
Programmable interleave
Programmable feedback loop compensation
Enable control with programmable polarity
Flexible fault management and propagation
Start-up into the load pre-biased up to 100%
Full rated current sink
Real time current and temperature measurements,
monitoring, and reporting
Small footprint SMT package: 16x32mm
Low profile of 8mm
Compatible with conventional pick-and-place
equipment
Wide operating temperature range
UL60950 recognized, CSA C22.2 No. 60950-00
certified, and TUV EN60950-1:2001 certified
Description
The ZY1015 is an intelligent, fully programmable step-down point-of-load DC-DC module integrating digital power
conversion and intelligent power management. The ZY1015 completely eliminates the need for external
components for sequencing, tracking, protection, monitoring, and reporting. Performance parameters of the
ZY1015 are programmable by pin strapping and external resistor and capacitor and can be changed by a user at
any time during product development and service without a need for a communication bus.
REV. 1.2 MAR 14, 2007
www.power-one.com
Page 1 of 17




ZY1015 pdf, 반도체, 판매, 대치품
ZY1015 15A No-Bus POL Data Sheet
3V to 14V Input 0.5V to 5.5V Output
VOUT [V]
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
Min Load 0.2A
3.0 3.15
5.5
6.25
2.0 4.0 6.0
8.0
10.0
12.0
14.0
VIN [V]
Figure 1. Output Voltage as a Function of Input Voltage and Output Current
4.3 Protection Specifications
Parameter
Conditions/Description
Min
Output Overcurrent Protection
Nom
Max Units
Type
Non-Latching, 130ms period
Threshold
Threshold Accuracy
-25
Output Overvoltage Protection
170
%IOUT
25 %IOCP.SET
Type
Threshold
Threshold Accuracy
Delay
Follows the output voltage setpoint
Measured at VO.SET=2.5V
From instant when threshold is exceeded until
the turn-off command is generated
Output Undervoltage Protection
-2
Latching
1301
2
6
%VO.SET
%VOVP.SET
µs
Type
Non-Latching, 130ms period
Threshold
Follows the output voltage setpoint
75 %VO.SET
Threshold Accuracy
Measured at VO.SET=2.5V
-2
2 %VUVP.SET
Delay
From instant when threshold is exceeded until
the turn-off command is generated
6
µs
REV. 1.2 MAR 14, 2007
www.power-one.com
Page 4 of 17

4페이지










ZY1015 전자부품, 판매, 대치품
ZY1015 15A No-Bus POL Data Sheet
3V to 14V Input 0.5V to 5.5V Output
4.5 Signal Specifications
Parameter
VDD
ViL_s
ViH_s
Conditions/Description
Internal supply voltage
SYNC Line
LOW level input voltage
HIGH level input voltage
Vhyst_s
IoL_s
Ipu_s
Tr_s
Cnode_s
Freq_s
Tsynq
Hysteresis of input Schmitt trigger
LOW level sink current V(SYNC)=0.5V
Pull-up current source V(SYNC)=0V
Maximum allowed rise time 10/90%VDD
Added node capacitance
Clock frequency of external SYNC line
Sync pulse duration
Min
3.15
-0.5
0.75 x
VDD
0.25 x
VDD
14
300
475
22
Nom
3.3
5
T0
Iup_x
ViL_x
ViH_x
Vhyst_x
RdnL_x
Iup_PG
Iup_OK
ViL_x
ViH_x
Vhyst_x
IoL_x
Iup_CS
ViL_CS
ViH_CS
Vhyst_CS
IoL_CS
Tr_CS
Data=0 pulse duration
72
Inputs: INTL0…INTL4, CCA0…CCA2, EN, ENP, IM
Pull-up current source V(X)=0
25
LOW level input voltage
-0.5
HIGH level input voltage
0.7 x VDD
Hysteresis of input Schmitt trigger
0.1 x VDD
External pull down resistance
pin forced low
Power Good and OK Inputs/Outputs
Pull-up current source V(PG)=0
25
Pull-up current source V(OK)=0
175
LOW level input voltage
-0.5
HIGH level input voltage
0.7 x VDD
Hysteresis of input Schmitt trigger
0.1 x VDD
LOW level sink current at 0.5V
4
Current Share/Sense Bus
Pull-up current source at V(CS)=0V
0.84
LOW level input voltage
HIGH level input voltage
Hysteresis of input Schmitt trigger
LOW level sink current V(CS)=0.5V
-0.5
0.75 x
VDD
0.25 x
VDD
14
Maximum allowed rise time 10/90% VDD
Max Units
3.45 V
0.3 x VDD
V
VDD + 0.5
0.45 x
VDD
60
1000
300
10
525
28
78
V
V
mA
µA
ns
pF
kHz
% of clock
cycle
% of clock
cycle
110
0.3 x VDD
VDD+0.5
0.3 x VDD
10
µA
V
V
V
k
110
725
0.3 x VDD
VDD+0.5
0.3 x VDD
20
µA
µA
V
V
V
mA
3.10
0.3 x VDD
VDD+0.5
0.45 x
VDD
60
100
mA
V
V
V
mA
ns
REV. 1.2 MAR 14, 2007
www.power-one.com
Page 7 of 17

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