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PDF AT24C1024B Data sheet ( Hoja de datos )
| Número de pieza | AT24C1024B | |
| Descripción | Two-wire Serial EEPROM | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• Low-voltage Operation
– 1.8V (VCC = 1.8V to 3.6V)
– 2.5V (VCC = 2.5V to 5.5V)
• Internally Organized 131,072 x 8
• Two-wire Serial Interface
• Schmitt Triggers, Filtered Inputs for Noise Suppression
• Bidirectional Data Transfer Protocol
• 400 kHz (1.8V) and 1 MHz (5V, 2.5V) Clock Rate
• Write Protect Pin for Hardware and Software Data Protection
• 256-byte Page Write Mode (Partial Page Writes Allowed)
• Random and Sequential Read Modes
• Self-timed Write Cycle (5 ms Typical)
• High Reliability
– Endurance: 1,000,000 Write Cycles/Page
– Data Retention: 40 Years
• 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP, 8-lead Ultra Thin
Small Array (SAP), and 8-ball dBGA2 Packages
• Die Sales: Wafer Form, Tape and Reel and Bumped Die
Description
The AT24C1024B provides 1,048,576 bits of serial electrically erasable and program-
mable read only memory (EEPROM) organized as 131,072 words of 8 bits each. The
device’s cascadable feature allows up to four devices to share a common two-wire
bus. The device is optimized for use in many industrial and commercial applications
where low-power and low-voltage operation are essential. The devices are available
in space-saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP,
8-ball dBGA2 and 8-lead Ultra Thin SAP packages. In addition, the entire family is
available in 1.8V (1.8V to 3.6V) and 2.5V (2.5V to 5.5V) versions.
8-lead PDIP
8-lead SOIC
NC
A1
A2
GND
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
8-lead dBGA2
VCC
WP
SCL
SDA
8
7
6
5
1 NC
2 A1
3 A2
4 GND
Bottom View
NC
A1
A2
GND
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
8-lead TSSOP
NC
A1
A2
GND
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
8-lead Ultra-Thin SAP
VCC
WP
SCL
SDA
8
7
6
5
1 NC
2 A1
3 A2
4 GND
Bottom View
Two-wire Serial
EEPROM
1M (131,072 x 8)
AT24C1024B
with Two Device
Address Inputs
NOT RECOMMENDED
FOR NEW DESIGNS
Replaced by AT24CM01
Rev. 5194F–SEEPR–1/08
1 page  
AT24C1024B
Table 3-3. AC Characteristics (Industrial Temperature)
Applicable over recommended operating range from TAI = 40C to +85C, VCC = +1.8V to +3.6V, CL = 100 pF (unless oth-
erwise noted). Test conditions are listed in Note 2.
1.8-volt
2.5, 5.0-volt
Symbol
ti
tAA
tBUF
Parameter
Min Max Min Max
Noise Suppression Time(1)
100 50
Clock Low to Data Out Valid
0.05 0.9 0.05 0.55
Time the bus must be free before a
new transmission can start(1)
1.3
0.5
Units
ns
µs
µs
tHD.STA
Start Hold Time
0.6 0.25
µs
tSU.STA
Start Set-up Time
0.6 0.25
µs
tHD.DAT
Data In Hold Time
00
µs
tSU.DAT
tR
tF
Data In Set-up Time
Inputs Rise Time(1)
Inputs Fall Time(1)
100 100
0.3 0.3
300 100
ns
µs
ns
tSU.STO
Stop Set-up Time
0.6 0.25
µs
tDH Data Out Hold Time
50 50
ns
tWR Write Cycle Time
5 5 ms
Endurance(1) 25°C, Page Mode, 3.3V
1,000,000
Write
Cycles
Notes: 1. This parameter is ensured by characterization only.
2. AC measurement conditions:
RL (connects to VCC): 1.3 k (2.5V, 5V), 10 k (1.8V)
Input pulse voltages: 0.3 VCC to 0.7 VCC
Input rise and fall times: 50 ns
Input and output timing reference voltages: 0.5 VCC
4. Device Operation
CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device.
Data on the SDA pin may change only during SCL low time periods (see Figure 4-4 on page 7).
Data changes during SCL high periods will indicate a start or stop condition as defined below.
START CONDITION: A high-to-low transition of SDA with SCL high is a start condition which
must precede any other command (see Figure 4-5 on page 8).
5194F–SEEPR–1/08
5
5 Page 
Figure 7-1. Device Address
A2 0
AT24C1024B
Figure 7-2. Byte Write
MOST
SIGNIFICANT
LEAST
SIGNIFICANT
P0
Figure 7-3. Page Write
MOST
SIGNIFICANT
P0
LEAST
SIGNIFICANT
Figure 7-4. Current Address Read
5194F–SEEPR–1/08
11
11 Page | ||
| Páginas | Total 25 Páginas | |
| PDF Descargar | [ Datasheet AT24C1024B.PDF ] | |
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