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부품번호 | AT24C128B 기능 |
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기능 | Two-wire Serial EEPROM | ||
제조업체 | ATMEL Corporation | ||
로고 | |||
전체 23 페이지수
1. Features
• Low-voltage and Standard-voltage Operation
– 1.8 (VCC = 1.8V to 5.5V)
• Internally Organized as 16,384 x 8
• Two-wire Serial Interface
• Schmitt Trigger, Filtered Inputs for Noise Suppression
• Bidirectional Data Transfer Protocol
• 1 MHz (5.5V, 2.5V), and 400 kHz (1.8V) Compatibility
• Write Protect Pin for Hardware and Software Data Protection
• 64-byte Page Write Mode (Partial Page Writes Allowed)
• Self-timed Write Cycle (5 ms Max)
• High Reliability
– Endurance: One Million Write Cycles
– Data Retention: 40 Years
• Lead-free/Halogen-free
• 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini MAP, 8-lead Ultra Lead
Frame Land Grid Array (ULA), 8-lead TSSOP, and 8-ball dBGA2 Packages
• Die Sales: Wafer Form, Tape and Reel and Bumped Wafers
Two-wire Serial
EEPROM
128K (16,384 x 8)
AT24C128B
2. Description
The AT24C128B provides 131,072 bits of serial electrically erasable and programma-
ble read-only memory (EEPROM) organized as 16,384 words of 8 bits each. The
device’s cascadable feature allows up to eight devices to share a common two-wire
bus. The device is optimized for use in many industrial and commercial applications
where low-power and low-voltage operation are essential. The devices are available
in space-saving 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini
MAP, 8-lead Ultra Lead Frame Land Grid Array (ULA), 8-lead TSSOP, and 8-ball
dBGA2 packages. In addition, the entire family is available in a 1.8V (5.5V to 3.6V)
version.
8-lead PDIP
8-lead SOIC
Table 0-1. Pin Configurations
Pin Name
Function
A0
A1
A2
GND
1
2
3
4
8 VCC
A0
7 WP
A1
6 SCL
A2
5 SDA GND
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
A0–A2
SDA
SCL
WP
GND
Address Inputs
Serial Data
Serial Clock Input
Write Protect
Ground
8-lead dBGA2
VCC 8
WP 7
SCL 6
SDA 5
1 A0
2 A1
3 A2
4 GND
8-lead TSSOP
A0
A1
A2
GND
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
Bottom View
8-lead Ultra Lead Frame Land Grid Array
VCC 8
1 A0
WP 7
2 A1
SCL 6
3 A2
SDA 5
4 GND
8-lead Ultra Thin Mini MAP
VCC 8
WP 7
SCL 6
SDA 5
1 A0
2 A1
3 A2
4 GND
Bottom View
Bottom View
Not Recommended
for New Design
Rev. 5296A–SEEPR–1/08
5. Memory Organization
AT24C128B, 128K SERIAL EEPROM: The 128K is internally organized as 256 pages of 64
bytes each. Random word addressing requires a 14-bit data word address.
Table 5-1. Pin Capacitance(1)
Applicable over recommended operating range from TA = 25C, f = 1.0 MHz, VCC = +1.8V to 5.5V
Symbol Test Condition
Max Units
CI/O
CIN
Note:
Input/Output Capacitance (SDA)
Input Capacitance (A0, A1, SCL)
1. This parameter is characterized and is not 100% tested.
8 pF
6 pF
Conditions
VI/O = 0V
VIN = 0V
Table 5-2. DC Characteristics
Applicable over recommended operating range from: TAI = 40C to +85C, VCC = +1.8V to +5.5V (unless otherwise noted)
Symbol Parameter
Test Condition
Min Typ Max Units
VCC1
ICC1
ICC2
ISB1
ILI
ILO
VIL
VIH
VOL2
VOL1
Notes:
Supply Voltage
Supply Current
Supply Current
Standby Current
(1.8V option)
Input Leakage Current
VCC = 5.0V
Output Leakage
Current
VCC = 5.0V
Input Low Level(1)
Input High Level(1)
VCC = 5.0V
VCC = 5.0V
VCC = 1.8V
VCC = 5.5V
READ at 400 kHz
WRITE at 400 kHz
VIN = VCC or VSS
VIN = VCC or VSS
VOUT = VCC or VSS
Output Low Level
VCC = 3.0V
IOL = 2.1 mA
Output Low Level
VCC = 1.8V
IOL = 0.15 mA
1. VIL min and VIH max are reference only and are not tested.
1.8
VCC x 0.7
5.5
1.0 2.0
2.0 3.0
1.0
6.0
0.10 3.0
0.05
3.0
VCC x 0.3
VCC + 0.5
0.4
0.2
V
mA
mA
µA
µA
µA
µA
V
V
V
V
4 AT24C128B
5296A–SEEPR–1/08
4페이지 AT24C128B
cycles, (c) create another start bit followed by stop bit condition as shown below. The device is
ready for next communication after above steps have been completed.
Figure 6-3. Software Reset
Start bit
Dummy Clock Cycles
Start bit
Stop bit
SCL
12 3
89
SDA
Figure 6-4. Bus Timing
SCL
SDA IN
tSU.STA
SDA OUT
Figure 6-5. Write Cycle Timing
SCL
tF
tLOW
tHD.STA
tHIGH
tHD.DAT
tLOW
tSU.DAT
tAA tDH
tR
tSU.STO
tBUF
SDA
8th BIT
ACK
WORDn
STOP
CONDITION
(1)
twr
START
CONDITION
Note: 1. The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle.
5296A–SEEPR–1/08
7
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구매 문의 | 일반 IC 문의 : 샘플 및 소량 구매 ----------------------------------------------------------------------- IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한 광범위한 전력 반도체를 판매합니다. 전력 반도체 전문업체 상호 : 아이지 인터내셔날 사이트 방문 : [ 홈페이지 ] [ 블로그 1 ] [ 블로그 2 ] |
부품번호 | 상세설명 및 기능 | 제조사 |
AT24C128 | 2-Wire Serial EEPROMs | ATMEL Corporation |
AT24C128B | Two-wire Serial EEPROM | ATMEL Corporation |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |