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PDF AT34C02C Data sheet ( Hoja de datos )
| Número de pieza | AT34C02C | |
| Descripción | Two-wire Serial EEPROM | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• Permanent and Reversible Software Write Protection for the First-half of the Array
– Software Procedure to Verify Write Protect Status
• Hardware Write Protection for the Entire Array
• Low-voltage and Standard-voltage Operation
– 1.7 (VCC = 1.7V to 3.6V)
• Internally Organized 256 x 8
• Two-wire Serial Interface
• Schmitt Trigger, Filtered Inputs for Noise Suppression
• Bidirectional Data Transfer Protocol
• 100 kHz (1.7V) and 400 kHz (2.7V and 3.6V) Compatibility
• 16-byte Page Write Modes
• Partial Page Writes Are Allowed
• Self-timed Write Cycle (5 ms max)
• High-reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
• 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini-MAP (MLP 2x3), 8-lead TSSOP, and 8-ball
dBGA2 Packages
Description
The AT34C02C provides 2048 bits of serial electrically-erasable and programmable
read only memory (EEPROM) organized as 256 words of 8 bits each. The first-half of
the device incorporates a permanent and a reversible software write protection feature
while hardware write protection for the entire array is available via an external pin.
Once the permanent software write protection is enabled, by sending a special com-
mand to the device, it cannot be reversed. However, the reversible software write
www.DataSheet4pUr.coomtection is enabled and can be reversed by sending a special command. The hard-
ware write protection is controlled with the WP pin and can be used to protect the
entire array, whether or not the software write protection has been enabled. This
allows the user to protect none, first-half, or all of the array depending on the applica-
tion. The device is optimized for use in many industrial and commercial applications
where low-power and low-voltage operations are essential. The AT34C02C is avail-
able in space saving 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini-MAP (MLP 2x3), 8-lead
TSSOP, and 8-ball dBGA2 packages and is accessed via a Two-wire serial interface.
It is available in 1.7V (1.7V to 3.6V).
Table 1. Pin Configurations
Pin Name Function
A0 - A2
Address Inputs
SDA
Serial Data
SCL Serial Clock Input
WP Write Protect
8-lead TSSOP
8-ball dBGA2
8-lead Ultra Thin Mini-MAP
VCC
WP
SCL
SDA
8
7
6
5
1 A0
2 A1
3 A2
4 GND
VCC
WP
SCL
SDA
8
7
6
5
1 A0
2 A1
3 A2
4 GND
Bottom View
(MLP 2x3)
Bottom View
8-lead SOIC
A0
A1
A2
GND
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
A0
A1
A2
GND
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
Two-wire Serial
EEPROM
with Permanent
and Reversible
Software Write
Protect
2K (256 x 8)
AT34C02C
Preliminary
Rev. 5185A–SEEPR–9/06
1
1 page  
AT34C02C [Preliminary]
Table 5. AC Characteristics
Applicable over recommended operating range from TAI = –40°C to +85°C, VCC = +1.7V to +3.6V, CL = 1 TTL Gate and
100 pF (unless otherwise noted)
1.7V
2.7V, 3.6V
Symbol
Parameter
Min Max Min Max Units
fSCL
tLOW
tHIGH
tI
tAA
tBUF
tHD.STA
tSU.STA
tHD.DAT
tSU.DAT
tR
tF
tSU.STO
tDH
tWR
Clock Frequency, SCL
Clock Pulse Width Low
Clock Pulse Width High
Noise Suppression Time(1)
Clock Low to Data Out Valid
Time the bus must be free before a new
transmission can start(1)
Start Hold Time
Start Set-up Time
Data In Hold Time
Data In Set-up Time
Inputs Rise Time(1)
Inputs Fall Time(1)
Stop Set-up Time
Data Out Hold Time
Write Cycle Time
Endurance(1)
25°C, Page Mode
Note: 1. This parameter is characterized and is not 100% tested.
100 400 kHz
4.7 1.2
µs
4.0 0.6
µs
100 50 ns
0.1 4.5 0.1 0.9 µs
4.7 1.2 µs
4.0 0.6 µs
4.7 0.6 µs
0 0 µs
200 100
ns
1.0 0.3 µs
300 300 ns
4.7 0.6 µs
100 50
ns
5 5 ms
1M
1M
Write
Cycles
5185A–SEEPR–9/06
5
5 Page 
AT34C02C [Preliminary]
Table 6. Write Protection
Pin
Preamble
RW
Command
A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0
Set PSWP
A2 A1 A0 0 1 1 0 A2 A1 A0 0
Set RSWP
0 0 VHV 0 1 1 0 0 0 1 0
Clear RSWP 0 1 VHV 0 1 1 0 0 1 1 0
Table 7. VHV
VHV
Note: VHV - VCC > 4.8V
Min
7
Max Units
10 V
Table 8. WP Connected to GND or Floating
WP Connected to GND or Floating
Command
R/W Bit
Permanent Write
Protect Register
PSWP
1010
R
X
1010
W Programmed
1010
W
X
1010
W Not Programmed
Reversible Write
Protect Register
RSWP
X
X
Programmed
Not Programmed
Acknowledgment
from Device
ACK
ACK
ACK
ACK
Action from Device
Can write to second Half (80H - FFH) only
Can write to second Half (80H - FFH) only
Can write to full array
Read PSWP
Read PSWP
Set PSWP
Set PSWP
R Programmed
R Not Programmed
W Programmed
W Not Programmed
X
X
X
X
No ACK
ACK
No ACK
ACK
STOP - Indicates permanent write protect register is
programmed
Read out data don't care. Indicates PSWP register
is not programmed
STOP - Indicates permanent write protect register is
programmed
Program permanent write protect register
(irreversible)
Read RSWP
Read RSWP
Set RSWP
Set RSWP
Clear RSWP
Clear RSWP
R X Programmed
R X Not Programmed
W X Programmed
W X Not Programmed
W Programmed
X
W Not Programmed
X
No ACK
ACK
No ACK
ACK
No ACK
ACK
STOP - Indicates reversible write protect register is
programmed
Read out data don't care. Indicates RSWP register
is not programmed
STOP - Indicates reversible write protect register is
programmed
Program reversible write protect register (reversible)
STOP - Indicates permanent write protect register is
programmed
Clear (unprogram) reversible write protect register
(reversible)
5185A–SEEPR–9/06
11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet AT34C02C.PDF ] | |
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