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부품번호 | AT83C26 기능 |
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기능 | Multiple Smart Card Reader Interface | ||
제조업체 | ATMEL Corporation | ||
로고 | |||
전체 30 페이지수
Features
• 5 Smart Card Interfaces
– Compliance with ISO 7816, EMV2000, GIE-CB and GSM Standards
– Direct Connection to the Smart Cards
Logic Level Shifters
Short Circuit Current Limitation
4kV+ ESD Protection (MIL/STD 883 Class 3)
– 1 or 2 Master Smart Card interfaces
Synchronous Card support (with C4 and C8 Contacts)
Card Detection and Automatic de-activation sequence on card extraction
– 1 to 4 SAM/SIM cards (15 to 30mA each)
– Programmable Voltage for each smart card
Class A: 5V ±0.4V at 60 mA (±0.25V at 65 mA with VCC= 5V±10%)
Class B: 3V ±0.2V at 60 mA
Class C: 1.8V ±0.14V at 40mA
– Low Ripple Noise: < 200 mV
– Programmable Activation Sequence
– Automatic de-activation on card power-fail or over-current and system power-fail
– Card Clock Stop High or Low for Card Power-down Modes
• Versatile Host Interface
– Two Wire Interface (TWI) Link at 400kbit/s
Programmable Address allow up to 4 AT83C26 on the bus
– Programmable Interrupt Output
• Reset Output Includes
– Power-On Reset (POR)
– Power-Fail Detector (PFD)
• Extended Voltage Operation: 3 to 5.5V
• Low Power Consumption
– 5 mA Maximum Operating Current (without Smart Card)
–www.DataSheet4U.com 150 mA Maximum In-rush Current (each DC/DC)
– 30 µA Typical Power-down Current (without Smart Card)
• 4 to 48 MHz Clock Input
• System clock derived from the external clock input
• Industrial Temperature Range: -40 to +85°C
• Packages: QFN48, VQFP48
Multiple Smart
Card Reader
Interface With
Power
Management
AT83C26
Description
The AT83C26 is a smart card reader interface IC for smart card reader/writer applica-
tions such as EFT/POS terminals and set top boxes. It enables the management of
any type of smart card from any kind of host. Up to 4 AT83C26 can be connected in
parallel thanks to the programmable TWI address.
Its high efficiency DC/DC converters and low quiescent current in stand-by mode
make it particularly suited to low power and portable applications. The reduced bill of
material allows to lower significantly the system size and cost. A sophisticated protec-
tion system guarantees timely and controlled shutdown upon error conditions.
7511D–SCR–02/07
Signals
Table 1. Ports Description
VQFP48 or
QFN48
Pin number
Pad Name
Pad Internal
Power Supply
Pad Type
Description
1 CVCC3
PWR VCC pin for SC3 interface.
2 CRST3/CC82 CVCC3
I/O
pull up
See SC2_CFG1 register:
If SC2_FULL bit = 0, CRST pin for SC3 interface.
If SC2_FULL bit = 1, CC8 pin for SC2 interface.
3 CCLK3
CVCC3
O CCLK pin for SC3 interface.
4
CIO3/CC42
CVCC3
I/O
pull up
See SC2_CFG1 register:
If SC2_FULL bit = 0, CIO pin for SC3 interface.
If SC2_FULL bit = 1, CC4 pin for SC2 interface.
5 CVCC4
PWR VCC pin for SC4 interface.
6 CRST4
CVCC4
O RST pin for SC4 interface.
7 CCLK4
CVCC4
O CCLK pin for SC4 interface.
8 CIO4
CVCC4
I/O
CIO pin for SC4 interface.
pull up
9 CIO5
CVCC5
I/O
CIO pin for SC5 interface.
pull up
10 CCLK5
CVCC5
O CCLK pin for SC5 interface.
11 CRST5
CVCC5
O RST pin for SC5 interface.
12 CVCC5
PWR VCC pin for SC5 interface.
13 CC81
CVCC1
I/O
CC8 pin for SC1 interface.
pull up
14 CC41
CVCC1
I/O
CC4 pin for SC1 interface.
pull up
15 CIO1
CVCC1
I/O
CIO pin for SC1 interface.
pull up
16 CCLK1
CVCC1
O CCLK pin for SC1 interface.
17 CRST1
CVCC1
O RST pin for SC1 interface.
18 CVCCIN1
PWR This pin must be connected to CVCC1 pins next to the package.
19 CPRES1
VCC
I
pull up
Card presence for SC1 interface.
An internal pull up to VCC can be activated in the pad if necessary using
PULLUP1 bit in SC1_CFG1 register (activated by default).
20 CVCC1
PWR
VCC pin for SC1 interface.
The two CVCC1 pins are connected together near the package. Only one
wire goes to the smart card connector. The reason of two CVCC1 pins is
to reduce noise.
21 CVCC1
PWR VCC pin for SC1 interface.
4 AT83C26
7511D–SCR–02/07
4페이지 AT83C26
Pad Type Description
To simplify the understanding of Figure 1. to Figure 8., a shortcut is possible by replacing the
weak transistor by a 100k Ohms pull-up resistor, the medium transistor by a
10k Ohms pull-up resistor and the strong transistor by a 1k Ohms pull-up resistor.
Input/Output with Pull-up Configuration (IO1, IO2, AUX1, AUX2)
This output type can be used as both an input and output without the need to reconfigure the
port. This is possible because when the port outputs a logic high, it is weakly driven, allowing an
external device to pull the pin low. When the port outputs a logic low state, it is driven strongly
and able to sink a fairly large current.
Figure 1. Input/Output with Pull-up Configuration
2 DCCLK
CLOCK DELAY
P
Strong
PMOS
P
Keep
Port latch
Data
N
NMOS
Pin
Input
Data
Input/Output with Pull-up Configuration (CIOn with n = 1, 2, 3, 4, 5) and (CC4n, CC8n with n = 1,
2)
Figure 2. Input/Output with Pull-up Configuration
Port latch
Data
2 DCCLK
CLOCK DELAY
P
Strong
PMOS
N
NMOS
P
Medium
Slew control
with
CIOn_SLEW_CTRL bits
(n= 1 to 5)
Pin
Input
Data
7511D–SCR–02/07
7
7페이지 | |||
구 성 | 총 30 페이지수 | ||
다운로드 | [ AT83C26.PDF 데이터시트 ] |
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구매 문의 | 일반 IC 문의 : 샘플 및 소량 구매 ----------------------------------------------------------------------- IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한 광범위한 전력 반도체를 판매합니다. 전력 반도체 전문업체 상호 : 아이지 인터내셔날 사이트 방문 : [ 홈페이지 ] [ 블로그 1 ] [ 블로그 2 ] |
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DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |