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PDF ATA5275 Data sheet ( Hoja de datos )
| Número de pieza | ATA5275 | |
| Descripción | TRANSMITTER IC | |
| Fabricantes | ATMEL Corporation | |
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Features
• Antenna Driver Stage with Adjustable Antenna Peak Current for up to 1.5 A
• Frequency Tuning Range from 100 kHz to 150 kHz
• Automatic Antenna Peak Current Regulation
• Self-tuning Oscillator for Antenna Resonant Frequency Adaption
• Capable of Driving a High-Q Antenna
• Integrated 5 V Regulator for External Load up to 10 mA
• Bi-directional Single Wire Interface for Microcontroller or ECU
• LF Baud Rates up to 4 kbaud and Amplitude Shift Keying (ASK) Modulation
• Low Power Standby Mode < 50 µA
• Antenna Driver Diagnosis: Peak Current, Antenna Frequency and Battery Voltage
Monitoring
• Power Supply Range 8 V to 24 V Direct Battery Input
• Load Dump Protection up to 45 V for 12 V Boards
• Operation at Temperature -40°C to +105°C
• EMI and ESD According to Automotive Requirements
• Highly Integrated, Fewer External Components Required
• Driver Overcurrent Protection
• Overtemperature Protection
Applications
• Tire Pressure Measurement (TPM)
Benefitswww.DataSheet4U.com
• Self Tuning Capability to Antenna Resonance Frequency
• Adjustable Antenna Peak Current Value
• Highest Integration Level for Embedded Automotive Systems
Electrostatic sensitive device.
Observe precautions for handling.
125 kHz
Transmitter IC
for TPM
ATA5275
Preliminary
Description
The ATA5275 is an integrated 1.5 A peak current BCDMOS antenna driver IC dedi-
cated as a 125 kHz wake-up channel transmitter for TPM applications.
It includes the full functionality to generate a magnetic LF field in conjunction with an
antenna coil to transmit data and power to a receiver. The transmission can be con-
trolled via a one wire I/O-interface by an external unit.
The smart power IC is delivered in a QFN20 power package with heat slug.
Rev. 4739C–AUTO–02/05
1 page  
ATA5275 [Preliminary]
Figure 3-3. STBY After DIO = L
STBY
TOUT_L
DIO
t
t
3.3 Transmission Mode
3.3.1
ASK Modulation
For the transmission of a wake-up signal or data to a receiver, the ATA5275 generates a
antenna resonance synchronized signal at the antenna driver output (DRV pin). A connected LC
antenna radiates a magnetic field. For the data transmission the field can be 100% amplitude
modulated by the DIO interface input. If a low level signal is applied at the DIO pin, the driver
generates a square wave signal DRV for the antenna. If a high level signal is applied at the DIO
pin the driver is stopped and switched to ground. In this way ASK modulated data can be trans-
mitted (see Figure 3-4).
Figure 3-4. Data Transmission
DIO
DRV
COIL
3.3.2
Anti-bouncing Filter in Transmission Mode
The DIO input signal is delayed for a anti-bouncing time.
The driver is switched on after a delay time of TDL (typically 64 µs) if the DIO is pulled to a low
level continuously. The driver is switched-off after a delay time of TDH if the DIO is pulled to high
level.
The TDH time depends on the antenna resonance frequency, suppressing short disturbance
pulses from the DIO Line.
Figure 3-5. Anti-bouncing
TD_L
TD_H
4739C–AUTO–02/05
5
5 Page 
ATA5275 [Preliminary]
7. Electrical Characteristics(1)
No. Parameters
Test Conditions
Pin Symbol Min. Typ. Max. Unit
1 Power Supply
1.1 Main supply voltage
I(VCC) = 10 mA,
including load and line
regulation
VCC
VCC
4.7 5.0 5.3
V
1.2 Supply current
1.3 Standby current
1.4
Power-on-reset
threshold voltage
without antenna load
Pin DVCC = 13.5 V,
Tamb = 90°C
DVCC
DVCC
VCC
ISUPP
ISTBY
VPOR
2 10 20 mA
20 35 60 µA
3.5 4 4.5 V
1.5
Load dump protection
voltage
DVCC
VBATLD
29
31
35
V
1.6
Under voltage
detection
DVCC
VBATUV
6.0
6.5
7.0
V
1.7 Thermal shut down
TSD
150 165 180
oC
1.8
Protection debounce
filter
TDEB
5 15 25 µs
2 Half-bridge Driver Stage
2.1
Coil driver resistance
low side driver
DRV,
DVSS
RDSONL
0.3 0.7
Ω
2.2
Coil driver resistance
high side driver
DVCC,
DRV
RDSONH
0.3 0.7
Ω
2.3
Overcurrent protection
threshold low side
DRV,
DVSS
IOCL
1.5 1.9 2.2
A
2.4
Overcurrent protection
threshold high side
DVCC,
DRV
IOCH
1.5 1.75 2.2
A
10% to 90% slope
time,
2.5
Driver output rise time
0% = DVSS,
100% = DVCC
DVCC = 12 V
(smooth edges)
DRV
TDRV,RISE
50
100 150
ns
10% to 90% slope
time,
2.6
Driver output fall time
0% = DVSS,
100% = DVCC
DVCC = 12 V
(smooth edges)
DRV
TDRV,FALL
50
100 150
ns
3 Antenna Peak Current Control
3.1
Duty cycle control
range
DRV
DCDRV(2)
15
85 %
3.2
Peak current control
reference
RCR
VRCR
1.15 1.215 1.28
V
3.3
Peak current control
accuracy
RCR = 25 kΩ
IApeak
1.0 1.3 1.8
A
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Notes: 1. 8 V < V(DVCC) < 24 V; -40° C < ϑamb < 105° C, unless otherwise specified; all values refer to GND
2. Definition of DCDRV see “Application Hints” on page 13
Type*
A
A
B
A
A
A
B
C, D
A
A
A
A
D
D
B
A
B
4739C–AUTO–02/05
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet ATA5275.PDF ] | |
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