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ATA5278 데이터시트 PDF




ATMEL Corporation에서 제조한 전자 부품 ATA5278은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


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부품번호 ATA5278 기능
기능 STAND-ALONE ANTENNA DRIVER
제조업체 ATMEL Corporation
로고 ATMEL Corporation 로고


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ATA5278 데이터시트, 핀배열, 회로
Features
SPI for Microcontroller Connection with Up to 1 Mbit/s
Internal Data Buffer for Timing-independent Data Transmission
Programmable Driver Current Regulation
One-chip Antenna Driver Stage for 1A Peak Current
LF Baud Rates Between 1 kbaud and 4 kbaud
Quick Start Control (QSC) for Fast Oscillation Build-up and Decay Timing
Integrated Oscillator for Ceramic Resonators
Power Supply Range from 7.5V to 16V Direct Battery Input
(Up to 28V With Limited Function Range)
Amplitude Shift Keying (ASK) Modulation
Phase Shift Keying (PSK) Modulation
Carrier Frequency Range from 100 kHz to 150 kHz
Operational Temperature –40°C to +105°C
EMI and ESD According to Automotive Requirements
Highly Integrated — Less External Components Required
Applications
Hands-free Car Access (Passive Entry/Go)
Tire Pressure Measurement
Home Access Control
Care Watch Systems
Benefitswww.DataSheet4U.com
Diagnosis Function and Overtemperature Protection
Load Dump Protection Up to 45V for 12V Boards
Power-down Mode for Minimum Power Consumption
Stand-alone
Antenna Driver
ATA5278
1. Description
The ATA5278 device is an integrated BCDMOS antenna driver IC dedicated as a
transmitter for Passive Entry/Go (PEG) car applications and for other hands-free
access control applications.
It includes the full functionality of generating a magnetic LF field in conjunction with an
antenna coil to transmit data to a receiver in a key fob, card or transponder. A micro-
controller can access the chip via a bi-directional serial interface.
Rev. 4832C–RKE–02/06




ATA5278 pdf, 반도체, 판매, 대치품
3. Functional Description
3.1 General Description
The IC contains a half-bridge coil driver stage with a special driver voltage regulator and control
logic with diagnosis circuitry. It is controllable by a serial programming interface (SPI).
In combination with an LC antenna circuitry, the IC generates an electromagnetic LF field. The
carrier frequency for the antenna is generated by the oscillator and a pre-scaler logic.
The LF field can be modulated to transmit data to a suitable receiver. Two modulation modes
are available: Amplitude Shift Keying (ASK) and 180° Phase Shift Keying (PSK). The transmis-
sion data has to be stored in the internal data buffer.
The IC consists of two main functional blocks:
• The SPI with the data buffer, the control registers and the oscillator
• The driver stage with its control logic and the power supply stage
A boost converter is used to supply the driver half-bridge with a high voltage and a regulated
current even if the battery voltage is low. The antenna current is programmable in 16 steps to
support a transmission with various field strengths.
The driver circuitry is protected against short-circuits and overload.
3.2 Operational States
After power-on-reset, the ATA5278 is in power-down mode. To achieve minimum power con-
sumption, only the internal 5-V supply and the control registers are active. The IC can only be
activated by the external control unit via the serial interface (i.e., the chip select line is enabled).
Once activated, the chip keeps the oscillator active and waits for commands on the serial bus.
This state can be described as standby mode. Only upon an external reset or on command fol-
lowed by disabling the chip select line, the power-down mode is re-invoked.
The modulator stage, together with the antenna driver and the power supply, is activated as
soon as LF data is written into the buffer and remains in this state until all data has been sent, a
stop command has been given via the SPI or a fault occurred. The data modulation is running
independently of the SPI activity and can be monitored with the MODACTIVE pin.
3.3 Power-down Mode
The ATA5278 should be kept in power-down mode as long as the LF channel is not used,
because not only is the current consumption minimal, but the internal logic is also reset. The
antenna driver stage is in high impedance mode. To power-up the chip, the chip-select line
(S_CS) has to be activated for an appropriate time. The SPI then starts the internal oscillator
which is necessary for proper operation. Only after a certain oscillation build-up time, is full func-
tionality available. The microcontroller can check out the state of the IC with two state bits
automatically returned by any SPI command.
4 ATA5278
4832C–RKE–02/06

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ATA5278 전자부품, 판매, 대치품
ATA5278
The main element of this circuit is the parallel inverting stage which generates the clock signal in
conjunction with the external reference device. During power-down mode, these inverters are
shut down and the pull-down structure on the OSCI pin is active. As soon as the SPI enables the
oscillator, the pull-down is disabled and the inverters are powered up. Now, the clock signal
assessment stage monitors the signal on the OSCI pin. As soon as the amplitude and the period
reach acceptable values, one of the two inverters (i.e., the drivers) is shut down in order to
reduce power dissipation in the external reference device. Figure 3-5 illustrates the period
assessment.
Figure 3-5. Oscillator Signal Assessment
Oscillator
enable signal
OSCO signal
Second inverter
enable signal
Clock signal for
internal logic
Clock signal for
internal logic
t > tLOW,max
t < tLOW,max
3.5 I/O Voltage Interface
All digital I/O pins, including the reset input pin NRES, are passed through the internal voltage
interface before they reach their concerning blocks. This interface prevents possible compensa-
tion currents, as the control logic of the ATA5278 is supplied by the internal 5V regulator. It is
capable of handling I/O voltages between 3.15V and 5.5V, determined by the voltage applied to
the VIF pin.
The pins NRES and S_CS are additionally equipped with a pull-up and a pull-down structure
respectively in order to ensure a defined behavior of the ATA5278 in case of a broken connec-
tion. If the NRES line is broken, the pull-up structure keeps the input in passive state and normal
operation is possible. A broken S_CS line will cause a permanently disabled SPI and S_DO pin,
so communication between the microcontroller and other SPI bus members is still possible. For
further details on the voltage interface, please refer to the table “Electrical Characteristics” on
page 27.
4832C–RKE–02/06
7

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