PDF AVR32AP Data sheet ( Hoja de datos )

Número de pieza	AVR32AP
Descripción	32-bit AVR Microcontroller
Fabricantes	ATMEL Corporation
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No Preview Available ! Feature Summary • 32-bit load/store AVR32B RISC architecture • 15 general-purpose 32-bit registers • 32-bit Stack Pointer, Program Counter and Link Register reside in register file • Fully orthogonal instruction set • Pipelined architecture allows one instruction per clock cycle for most instructions • Byte, half-word, word and double word memory access • Shadowed interrupt context for INT3 and multiple interrupt priority levels • Privileged and unprivileged modes enabling efficient and secure Operating Systems • Full MMU allows for operating systems with memory protection • Instruction and data caches • Innovative instruction set together with variable instruction length ensuring industry leading code density • DSP extention with saturating arithmetic, and a wide variety of multiply instructions • SIMD extention for media applications • Dynamic branch prediction and return address stack for fast change-of-flow • Powerful On-Chip Debug system • Coprocessor interface www.DataSheet4U.com 32-bit AVR® Microcontroller AVR32 AP Technical Reference Manual 32001A–AVR32–06/06 1 page AVR32 1.6 The AVR32 AP implementation The first implementation of the AVR32B microarchitecture is designed as an application proces- sor and called AVR32 AP. This implementation targets high-performance applications in the DSP, multimedia and wireless segment, and provides: • Advanced OCD system. • Efficient data and instruction caches. • Full MMU. • Java acceleration is implemented in hardware. • Fast interrupt handling is provided through shadowed register banks for interrupt priority 3. • SIMD extension. • DSP extension. • Service Access Port (SAP) that gives an external JTAG controller access to memories and registers inside the AVR32 AP core. Figure 1-1 on page 5 displays the contents of AVR32 AP: Figure 1-1. Overview of AVR32 AP. OCD system Service Access Port Reset control Tightly Coupled Bus AVR32 AP CPU pipeline with Java accelerator BTB RAM interface Dcache Cache RAM interface controller High Speed bus master MMU Icache controller Cache RAM interface High Speed bus master 32001A–AVR32–06/06 5 5 Page AVR32 Table 2-2. System Registers implemented in AVR32 AP (Continued) Reg # 29 30 31 32 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 192 193 194 Address 116 120 124 128 256 260 264 268 272 276 280 284 288 292 296 300 304 308 312 316 768 772 776 Name JAVA_LV6 JAVA_LV7 JTBA JBCR CONFIG0 CONFIG1 COUNT COMPARE TLBEHI TLBELO PTBR TLBEAR MMUCR TLBARLO TLBARHI PCCNT PCNT0 PCNT1 PCCR BEAR SABAL SABAH SABD Function Java Local Variable 6 Java Local Variable 7 Java Trap Base Address Java Write Barrier Control Register Configuration register 0 Configuration register 1 Cycle Counter register Compare register TLB Entry High TLB Entry Low Page Table Base Register TLB Exception Address Register MMU Control Register TLB Accessed Register Low TLB Accessed Register High Performance Clock Counter Performance Counter 0 Performance Counter 1 Performance Counter Control Register Bus Error Address Register SAB Address Low Register SAB Address High Register SAB Data Register Location in pipeline A1 A1 A1 A1 TCB TCB TCB TCB TCB TCB TCB TCB TCB TCB TCB TCB TCB TCB TCB TCB TCB TCB TCB SR - Status Register The Status Register is mapped into the system register space. This allows it to be loaded into the register file to be modified, or to be stored to memory. The Status Register is described in detail in Section 2.4 on page 7. EVBA - Exception Vector Base Address This register contains a pointer to the exception routines. All exception routines starts at this address, or at a defined offset relative to the address. Special alignment requirements apply for EVBA, see Section 3.10 ”Event handling” on page 30. ACBA - Application Call Base Address Pointer to the start of a table of function pointers. Subroutines residing in this space can be called by the compact acall instruction. This facilitates efficient reuse of code. Keeping this base pointer as a register facilitates multiple application spaces. ACBA is a full 32 bit register, but the 32001A–AVR32–06/06 11 11 Page

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