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부품번호 | PESD5V0S2BT 기능 |
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기능 | Low Capacitance Bi-directional Double Esd Protection Diode | ||
제조업체 | NXP Semiconductors | ||
로고 | |||
전체 11 페이지수
PESD5V0S2BT
Low capacitance bi-directional double ESD protection diode
in SOT23 package
Rev. 02 — 27 May 2004
Product data sheet
1. Product profile
www.DataSheet4U.com
1.1 General description
Low capacitance bi-directional double ESD protection diode in the small SOT23 plastic
package designed to protect 2 data lines from the damage caused by Electro Static
Discharge (ESD) and other transients.
1.2 Features
s Bi-directional ESD protection of 2 lines
s Low diode capacitance
s Max. peak pulse power: Ppp = 130 W at tp = 8/20 µs
s Low clamping voltage: VCL(R) = 14 V at Ipp = 12 A
s Ultra low leakage current: IRM = 5 nA at VRWM = 5 V
s ESD protection > 30 kV
s IEC 61000-4-2; level 4 (ESD)
s IEC-61000-4-5 (surge); Ipp = 12 A at tp = 8/20 µs.
1.3 Applications
s Cellular handsets and accessories
s Portable electronics
s Computers and peripherals
s Communication systems
s Audio and video equipment.
1.4 Quick reference data
Table 1:
Symbol
VRWM
Cd
Quick reference data
Parameter
reverse stand-off voltage
diode capacitance
number of protected lines
Conditions
f = 1 MHz;
VR = 0 V
Min Typ Max Unit
- 5- V
- 35 - pF
- 2-
Philips Semiconductors
PESD5V0S2BT
Low capacitance bi-directional double ESD protection diode
6. Characteristics
Table 8: Electrical characteristics
Tamb = 25 °C unless otherwise specified.
Symbol Parameter
Conditions
Min Typ
Per diode
VRWM reverse stand-off
voltage
IRM reverse leakage
current
V(CL)R clamping voltage
VBR breakdown voltage
rdiff differential
resistance
VRWM = 5 V
Ipp = 1 A
Ipp = 12 A
IR = 1 mA
IR = 1 mA
--
-5
[1] [2]
[1] [2]
-
-
5.5
-
-
-
-
-
Cd diode capacitance f = 1 MHz; VR = 0 V
- 35
[1] Non-repetitive current pulse 8/20 µs exponential decay waveform, see Figure 3.
[2] Measured from pin 1 to 3 or pin 2 to 3.
Max Unit
5V
100 nA
10 V
14 V
9.5 V
50 Ω
45 pF
www.DataSheet4U.com
103
Ppp
(W)
102
001aaa632
1.2
Ppp
Ppp(25 °C)
0.8
0.4
001aaa633
10
1
10 102 103 104
tp (µs)
Tamb = 25 °C.
tp = 8/20 µs exponential decay waveform; see
Figure 1.
Fig 3. Peak pulse power dissipation as a function of
pulse time; typical values.
0
0 50
Tamb = 25 °C.
100 150 200
Tj (°C)
Fig 4. Relative variation of peak pulse power as a
function of junction temperature; typical
values.
9397 750 13344
Product data sheet
Rev. 02 — 27 May 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
4 of 11
4페이지 Philips Semiconductors
PESD5V0S2BT
Low capacitance bi-directional double ESD protection diode
7. Application information
The PESD5V0S2BT is designed for the bi-directional protection of 2 lines from the
damage caused by Electro Static Discharge (ESD) and surge pulses. The
PESD5V0S2BT may be used on lines where the signal polarities are above and below
ground. The PESD5V0S2BT provides a surge capability of 130 Watts peak Ppp per line for
an 8/20 µs waveform.
line 1 to be protected
line 2 to be protected
www.DataSheet4U.com
PESD5V0S2BT
GND
001aaa636
Fig 8. Typical application for bi-directional protection of two lines.
Circuit board layout and protection device placement:
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT)
and surge transients. The following guidelines are recommended:
1. Place the PESD5V0S2BT as close to the input terminal or connector as possible.
2. The path length between the PESD5V0S2BT and the protected line should be
minimized.
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all printed-circuit board conductive loops including power and group loops.
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer printed-circuit
boards, use ground vias.
9397 750 13344
Product data sheet
Rev. 02 — 27 May 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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