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CS42435 데이터시트 PDF




Cirrus Logic에서 제조한 전자 부품 CS42435은 전자 산업 및 응용 분야에서
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부품번호 CS42435 기능
기능 Surround-sound Codecs
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CS42435 데이터시트, 핀배열, 회로
CS42435
108 dB, 192 kHz 4-In, 8-Out TDM CODEC
FEATURES
GENERAL DESCRIPTION
 Four 24-bit A/D, Eight 24-bit D/A Converters
 ADC Dynamic Range
– 105 dB Differential
– 102 dB Single-Ended
 DAC Dynamic Range
– 108 dB Differential
– 105 dB Single-Ended
 ADC/DAC THD+N
– -98 dB Differential
– -95 dB Single-Ended
 Compatible with Industry-Standard Time
Division Multiplexed (TDM) Serial Interface
 DAC Sampling Rates up to 192 kHz
 ADC Sampling Rates up to 96 kHz
 Programmable ADC High-Pass Filter for DC
Offset Calibration
www.DataSheet4U.com Logarithmic Digital Volume Control
 Hardware Mode or Software I²C® & SPI
 Supports Logic Levels Between 5 V and 1.8 V
The CS42435 CODEC provides four multi-bit analog-to-
digital and eight multi-bit digital-to-analog delta-sigma
converters. The CODEC is capable of operation with ei-
ther differential or single-ended inputs and outputs, in a
52-pin MQFP package.
Four fully differential, or single-ended, inputs are avail-
able on stereo ADC1 and ADC2. Digital volume control
is provided for each ADC channel, with selectable over-
flow detection. An auxiliary serial input is available for
an additional two channels of PCM data.
All eight DAC channels provide digital volume control
and can operate with differential or single-ended
outputs.
The CS42435 is available in a 52-pin MQFP package in
Commercial (-40° to +85°) and Automotive (-40° to
+105°) grades. The CDB42438 Customer Demonstra-
tion board is also available for device evaluation and
implementation suggestions. Please refer to “Ordering
Information” on page 58 for complete ordering
information.
The CS42435 is ideal for audio systems requiring wide
dynamic range, negligible distortion and low noise, such
as A/V receivers, DVD receivers, and automotive audio
systems.
Control Port & Serial
Audio Port Supply =
1.8 V to 5 V
Digital Supply = 3.3 V
Hardware Mode or
I2C/SPI Software Mode
Control Data
Reset
Register
Configuration
Analog Supply =
3.3 V to 5 V
Internal Voltage
Reference
TDM Serial Audio
Input
Auxilliary Serial
Audio Input
Input Master
Clock
TDM Serial Audio
Output
http://www.cirrus.com
Volume
Controls
Digital
Filters
ΔΣ
Modulators
High Pass
Filter
High Pass
Filter
Digital
Filters
Digital
Filters
Multibit
DAC1-4 and
Analog Filters
8
8
Differential or
Single-Ended
Outputs
Multibit
Oversampling
ADC1
Multibit
Oversampling
ADC2
2
2
Differential or
Single-Ended
Analog Inputs
2
2
Copyright © Cirrus Logic, Inc. 2006
(All Rights Reserved)
OCTOBER '06
DS685F1




CS42435 pdf, 반도체, 판매, 대치품
CS42435
14. ORDERING INFORMATION ............................................................................................................... 58
15. REVISION HISTORY ........................................................................................................................... 58
LIST OF FIGURES
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Figure 1.Typical Connection Diagram (Software Mode) ........................................................................... 11
Figure 2.Typical Connection Diagram (Hardware Mode) .......................................................................... 12
Figure 3.Output Test Circuit for Maximum Load ....................................................................................... 19
Figure 4.Maximum Loading ....................................................................................................................... 19
Figure 5.TDM Serial Audio Interface Timing ............................................................................................. 21
Figure 6.Serial Audio Interface Slave Mode Timing .................................................................................. 22
Figure 7.Control Port Timing - I²C Format ................................................................................................. 23
Figure 8.Control Port Timing - SPI Format ................................................................................................ 24
Figure 9.Full-Scale Input ........................................................................................................................... 28
Figure 10.Audio Output Initialization Flow Chart ....................................................................................... 30
Figure 11.Full-Scale Output ...................................................................................................................... 31
Figure 12.De-Emphasis Curve .................................................................................................................. 32
Figure 13.TDM Serial Audio Format ......................................................................................................... 33
Figure 14.AUX I²S Format ......................................................................................................................... 33
Figure 15.AUX Left-Justified Format ......................................................................................................... 34
Figure 16.Control Port Timing in SPI Mode .............................................................................................. 35
Figure 17.Control Port Timing, I²C Write ................................................................................................... 35
Figure 18.Control Port Timing, I²C Read ................................................................................................... 36
Figure 19.Single-to-Differential Active Input Filter ..................................................................................... 49
Figure 20.Single-Ended Active Input Filter ................................................................................................ 49
Figure 21.Passive Input Filter ................................................................................................................... 50
Figure 22.Passive Input Filter w/Attenuation ............................................................................................. 50
Figure 23.Active Analog Output Filter ....................................................................................................... 51
Figure 24.Passive Analog Output Filter .................................................................................................... 51
Figure 25.SSM Stopband Rejection .......................................................................................................... 52
Figure 26.SSM Transition Band ................................................................................................................ 52
Figure 27.SSM Transition Band (Detail) ................................................................................................... 52
Figure 28.SSM Passband Ripple .............................................................................................................. 52
Figure 29.DSM Stopband Rejection .......................................................................................................... 52
Figure 30.DSM Transition Band ................................................................................................................ 52
Figure 31.DSM Transition Band (Detail) ................................................................................................... 53
Figure 32.DSM Passband Ripple .............................................................................................................. 53
Figure 33.SSM Stopband Rejection .......................................................................................................... 54
Figure 34.SSM Transition Band ................................................................................................................ 54
Figure 35.SSM Transition Band (detail) .................................................................................................... 54
Figure 36.SSM Passband Ripple .............................................................................................................. 54
Figure 37.DSM Stopband Rejection .......................................................................................................... 54
Figure 38.DSM Transition Band ................................................................................................................ 54
Figure 39.DSM Transition Band (detail) .................................................................................................... 55
Figure 40.DSM Passband Ripple .............................................................................................................. 55
Figure 41.QSM Stopband Rejection ......................................................................................................... 55
Figure 42.QSM Transition Band ................................................................................................................ 55
Figure 43.QSM Transition Band (detail) .................................................................................................... 55
Figure 44.QSM Passband Ripple .............................................................................................................. 55
LIST OF TABLES
Table 1. I/O Power Rails ............................................................................................................................. 8
Table 2. Hardware Configurable Settings ................................................................................................. 27
Table 3. MCLK Frequency Settings .......................................................................................................... 32
4 DS685F1

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CS42435 전자부품, 판매, 대치품
AUX_SCLK
AUX_SDIN
AOUT1 +,-
AOUT2 +,-
AOUT3 +,-
AOUT4 +,-
AOUT5 +,-
AOUT6 +,-
AOUT7 +,-
AOUT8 +,-
TSTN
AGND
VQ
VA
AIN1 +,-
AIN2 +,-
AIN3 +,-
AIN4 +,-
FILT+
CS42435
16 Auxiliary Serial Clock (Output) - Serial clock for the Auxiliary serial audio interface.
17
Auxiliary Serial Input (Input) - The 42435 provides an additional serial input for two’s comple-
ment serial audio data.
20,19
21,22
24,23
25,26
28,27
29,30
Differential Analog Output (Output) - The full-scale differential analog output level is specified in
the Analog Characteristics specification table. Each positive leg of the differential outputs may
also be used single-ended.
32,31
33,34
49,50 Test In - These pins are inputs used for test purposes only. They must be tied to ground for nor-
51,52 mal operation.
35,48 Analog Ground (Input) - Ground reference for the analog section.
36 Quiescent Voltage (Output) - Filter connection for internal quiescent reference voltage.
37,46 Analog Power (Input) - Positive power supply for the analog section.
39,38
41,40
43,42
45,44
Differential Analog Input (Input) - Signals are presented differentially to the delta-
sigma modulators. The full-scale input level is specified in the Analog Characteristics
specification table.
47
Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling cir-
cuits.
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DS685F1
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