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PDF BUF12800 Data sheet ( Hoja de datos )

Número de pieza BUF12800
Descripción REFERENCE VOLTAGE GENERATOR
Fabricantes Burr-Brown 
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No Preview Available ! BUF12800 Hoja de datos, Descripción, Manual

BUF12800
SBOS315 − DECEMBER 2004
REFERENCE VOLTAGE GENERATOR
for LCD GAMMA CORRECTION
FEATURES
D 12-CHANNEL GAMMA CORRECTION
D 10-BIT RESOLUTION
D DOUBLE-BUFFERED DAC REGISTERS
D INTEGRATED REFERENCE BUFFERS
D RAIL-TO-RAIL OUTPUT
D LOW SUPPLY CURRENT: 900µA/ch
D SUPPLY VOLTAGE: 7V to 18V
D DIGITAL SUPPLY: 2.7V to 5.5V
D INDUSTRY-STANDARD TWO-WIRE INTERFACE
− High-Speed Mode: 3.4MHz
D HIGH ESD RATING:
− 4kV HBM, 1kV CDM, 200V MM
D DEMOBOARD AND SOFTWARE AVAILABLE
www.DataSheet4U.com
VSD
4
VS
1, 2
BUF12800
REFH
3
6
SDA
SCL
5
Control IF
87
LD A0
10
REFL
9
13
Out A
14
Out B
15
Out C
16
Out D
17
Out E
18
Out F
19
Out G
20
Out H
21
Out I
22
Out J
23
Out K
24
Out L
11, 12
APPLICATIONS
D TFT-LCD REFERENCE DRIVERS
D REFERENCE VOLTAGE GENERATORS
D INDUSTRIAL PROCESS CONTROL
DESCRIPTION
The BUF12800 is a programmable voltage reference
generator designed for dynamic gamma correction in
TFT-LCD panels. It provides 12 programmable outputs,
each with 10-bit resolution.
TI’s new, small geometry, state-of-the-art, analog CMOS
process allows the use of one digital-to-analog converter
(DAC) per channel while still maintaining a very small chip
size. This topology has the advantage of significantly
increased programming speed over existing program-
mable buffers.
Programming of each output occurs through an industry-
standard, two-wire serial interface. Unlike existing
programmable buffers, the BUF12800 offers a high-
speed, two-wire interface mode that allows clock speeds
up to 3.4MHz. The BUF12800 features a double-buffered
DAC register structure that significantly simplifies imple-
mentation of dynamic gamma control. This further reduces
programming time, especially when many channels have
to be updated simultaneously.
Reference pins set the high and low voltages of the output
range. They are internally buffered, which simplifies
design. They may be connected to external resistors to
divide the output range for finer resolution of outputs.
The BUF12800 is available in a TSSOP-24 PowerPAD
package. It is specified from −40°C to +85°C.
BUF12800 RELATED PRODUCTS
FEATURES
11-Channel Gamma Correction Buffer, Int VCOM
6-Channel Gamma Correction Buffer, Int VCOM
6-Channel Gamma Correction Buffer
4-Channel Gamma Correction Buffer, Int VCOM
High-Supply Voltage Gamma Buffers
20-Channel Programmable Buffer, 10-Bit, VCOM
PRODUCT
BUF11702
BUF07703
BUF06703
BUF05703
BUFxx704
BUF20800
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a registered trademark of Texas Instruments. All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Copyright 2004, Texas Instruments Incorporated
www.ti.com

1 page




BUF12800 pdf
BUF12800
www.ti.com
APPLICATIONS INFORMATION
The BUF12800 programmable voltage reference allows
fast and easy adjustment of 12 programmable reference
outputs, each with 10-bit resolution. It allows very simple,
time-efficient adjustment of the gamma reference
voltages. The BUF12800 is programmed through a
high-speed standard two-wire interface. The BUF12800
features a double-register structure for each DAC channel
to simplify the implementation of dynamic gamma control
(see the Dynamic Control section). This allows pre-loading
of register data and rapid updating of all channels
simultaneously.
Buffers A−F are able to swing to within 300mV of the
positive supply rail, and to within 1.1V of the negative
SBOS315 − DECEMBER 2004
supply rail. Buffers G−L are able to swing to within 1.7V
of the positive supply rail, and to within 300mV of the
negative supply rail. (See the Electrical Characteristics
table for further information).
Each buffer is capable of full-scale change in output
voltage in less than 4µs; see Figure 4, typical
characteristic Full-Scale Output Swing.
Figure 7 shows the BUF12800 in a typical configuration.
In this configuration, the BUF12800 device address is 74h.
The output of each DAC is immediately updated as soon
as data is received in the corresponding register (LD = 0).
For maximum dynamic range, set VREFH = VS − 0.2V and
VREFL = VS + 0.2V.
VS
10µF
100nF
BUF12800
1 VS
Out L 24
2 VS
Out K 23
3 REFH
Out J 22
(1)
(1)
Source
Driver
(1)
3.3V
1µF 100nF
Timing
Controller
4 VDS
5 SCL
6 SDA
Out I 21
Out H 20
Out G 19
(1)
(1)
(1)
7 A0
Out F 18
(1)
8 LD
Out E 17
(1)
9 GNDD(2)
Out D 16
(1)
(1)
VS
10 REFL
Out C 15
11 GNDA(2)
Out B 14
(1)
12 GNDA(2)
Out A 13
(1)
(1) RC combination optional.
(2) GNDD and GNDA are internally connected and must be at the same voltage potential.
Figure 7. Typical Application Configuration
5

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BUF12800 arduino
BUF12800
www.ti.com
DYNAMIC GAMMA CONTROL
Dynamic gamma control is a technique used to improve
the picture quality in LCD TV applications. The brightness
in each picture frame is analyzed and the gamma curves
are adjusted on a frame-by-frame basis. The gamma
curves are typically updated during the short vertical
blanking period in the video signal. Figure 12 shows a
block diagram using the BUF12800 for dynamic gamma
control.
The BUF12800 is ideally suited for rapidly changing the
gamma curves due to its unique topology:
double register input structure to the DAC
fast serial interface
simultaneous updating of all DACs by software.
See the Read/Write Operations to write to all
registers and Output Latch sections.
The double register input structure saves programming
time by allowing updated DAC values to be pre-stored into
the first register bank. Storage of this data can occur while
SBOS315 − DECEMBER 2004
a picture is still being displayed. Because the data is only
stored into the first register bank, the DAC output values
remain unchanged—the display is unaffected. During the
vertical sync period, the DAC outputs (and therefore, the
gamma voltages) can be quickly updated either by using
an additional control line connected to the LD pin, or
through software—writing a 1 in bit 15 of any DAC register.
For the details on the operation of the double register input
structure, see the Output Latch section.
Example: Update all 12 registers simultaneously via
software.
Step 1: Check if LD pin is placed in HIGH state.
Step 2: Write DAC Registers 1−12 with bit 15 always 0.
Step 3: Write any DAC register a second time with
identical data. Make sure that bit 15 is 1. All DAC
channels will be updated simultaneously after receiving
the last bit of data.
Digital
Picture
Data
Histogram
Gamma
Adjustment
Algorithm
Black
White
Timing Controller/µController
SDA
BUF12800
Gamma References
SCL
A through L
Source Driver Source Driver
Figure 12. Dynamic Gamma Control
11

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