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BUF16820 PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 BUF16820
기능 14-Channel GAMMA VOLTAGE GENERATOR
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BUF16820 데이터시트, 핀배열, 회로
BUF16820
BU F168 20
SBOS356A − FEBRUARY 2006 − REVISED OCTOBER 2006
14-Channel GAMMA VOLTAGE GENERATOR
with Programmable VCOM Outputs and OTP Memory
FEATURES
D 14-CHANNEL GAMMA CORRECTION
D 2 VCOM OUTPUTS
D ON-CHIP OTP MEMORY
D 10-BIT RESOLUTION
D RAIL-TO-RAIL OUTPUT
D LOW SUPPLY CURRENT: 1mA/ch
D SUPPLY VOLTAGE: 8.5V to 18V
D DIGITAL SUPPLY: 2.0V to 5.5V
D INDUSTRY-STANDARD, TWO-WIRE
INTERFACE: 3.4MHz HIGH-SPEED MODE
D HIGH ESD RATING:
4kV HBM, 1kV CDM, 200V MM
D DEMO BOARD AND SOFTWARE AVAILABLE
www.DataSheet4U.com
2V to 5.5V
BUF16820
Digital
8.5V to 18V
Analog
REFH
SDA
SCL
Control IF
LD A0
REFH OUT
OUT1
OUT2
14 Output Channels plus
Two VCOM Channels
OUT13
OUT14
VCOM1
VCOM2
REFL OUT
REFL
APPLICATIONS
D REPLACES RESISTOR-BASED GAMMA
SOLUTIONS
D TFT-LCD REFERENCE DRIVERS
D DYNAMIC GAMMA CONTROL
DESCRIPTION
The BUF16820 is a programmable voltage reference
generator designed for gamma correction in TFT-LCD
panels. It provides 14 programmable outputs and two
VCOM channels, each with 10-bit resolution. It offers
on-chip, one-time programmable (OTP) memory that
allows the user to store the gamma voltages on-chip. This
eliminates the need for an external EEPROM.
This programmability replaces the traditional, time-
consuming process of changing resistor values to optimize
the various gamma voltages, and allows designers to
determine the correct gamma voltages for a panel very
quickly. Required voltage changes can also be easily
implemented without changing the hardware.
The BUF16820 uses TI’s latest, small-geometry analog
CMOS process, which makes it a very competitive choice
for full production, not just evaluation.
Programming of each output occurs through an industry-
standard, two-wire serial interface. Unlike existing
programmable buffers, the BUF16820 offers a high-speed
mode that allows clock speeds up to 3.4MHz.
For devices with a lower or higher channel count, please
contact your local sales or marketing representative.
The BUF16820 is available in an HTSSOP-32
PowerPADpackage. It is specified from −40°C to +85°C.
BUF16820 RELATED PRODUCTS
FEATURES
18-Channel Programmable, Two VCOM Channels, Memory
12-Channel Programmable Buffer, 10-Bit
Programmable VCOM
10 + 1 Channel Gamma Buffer, 22V Supply Voltage
Complete LCD DC/DC Solution
PRODUCT
BUF20820
BUF12800
BUF01900
BUF11705
TPS651xx
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a registered trademark of Texas Instruments. All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Copyright 2006, Texas Instruments Incorporated
www.ti.com




BUF16820 pdf, 반도체, 판매, 대치품
BUF16820
SBOS356A − FEBRUARY 2006 − REVISED OCTOBER 2006
www.ti.com
TYPICAL CHARACTERISTICS
At TA = +25°C, VS = 18V, VSD = 5V, VREFH = 17V, VREFL = 1V, RL = 1.5kconnected to ground, and CL = 200pF, unless otherwise noted.
20
18
16
14
12
10
8
6
4
2
0
40
ANALOG SUPPLY CURRENT vs TEMPERATURE
VS = 18V
VS = 10V
20 0
20 40 60 80
Temperature (_C)
100
Figure 1
FULL−SCALE OUTPUT SWING
REFH = 17V
REFL = 1V
Code 3FF 000
Code 000 3FF
Time (1µs/div)
Figure 3
INTEGRAL NONLINEARITY ERROR vs INPUT CODE
0.6
0.4
0.2
0
0.2
0.4
0.6
0
200 400 600 800 1000
Input Code
Figure 5
DIGITAL SUPPLY CURRENT vs TEMPERATURE
30
VS = 5V
25
20
VS = 3.3V
15
10
5
0
40
20
0
20 40 60 80 100
Temperature (_ C)
Figure 2
OUTPUT VOLTAGE vs OUTPUT CURRENT
18
17
16 OUT10−14 (sourcing), Code = 3FFh
15
VREFL = 0.2V, VREFH = 17V
RLOAD Connected to GND
3 OUT1−9, VCOM1−2 (sinking)
Code = 000h
2 VREFL = 1V, VREFH = 17.8V
RLOAD Connected to 18V
1
OUT1−9, VCOM1−2 (sourcing)
Code = 3FFh
VREFL = 1V, VREFH = 17.8V
RLOAD Connected to GND
OUT10−14 (sinking), Code = 000h
VREFL = 0.2V, VREFH = 17V
RLOAD Connected to 18V
0
0 10 20 30 40 50 60 70 80 90 100
Output Current (mA)
Figure 4
DIFFERENTIAL NONLINEARITY ERROR vs INPUT CODE
0.6
0.4
0.2
0
0.2
0.4
0.6
0
200 400 600 800 1000
Input Code
Figure 6
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BUF16820 전자부품, 판매, 대치품
BUF16820
www.ti.com
DATA RATES
The two-wire bus operates in one of three speed modes:
D Standard—allows a clock frequency of up to 100kHz;
D Fast—allows a clock frequency of up to 400kHz;
D High-speed—allows a clock frequency of up to 3.4MHz.
The BUF16820 is fully compatible with all three modes. No
special action is required to use the device in Standard or
Fast modes, but High-speed (Hs) mode must be activated.
To activate Hs mode, send a special address byte of
00001xxx, with SCL = 400kHz, following the START
condition; where xxx are bits unique to the Hs-capable
master, which can be any value. This byte is called the Hs
master code. (Note that this is different from normal
address bytes—the low bit does not indicate read/write
status.) The BUF16820 will respond to the Hs command
regardless of the value of these last three bits. The
BUF16820 will not acknowledge this byte; the
communication protocol prohibits acknowledgement of
the Hs master code. Upon receiving a master code, the
BUF16820 will switch on its Hs mode filters, and
communicate at up to 3.4MHz. Additional high-speed
transfers may be initiated without resending the Hs mode
byte by generating a repeat START without a STOP. The
BUF16820 will switch out of Hs mode with the next STOP
condition.
GENERAL CALL RESET AND POWER-UP
The BUF16820 responds to a General Call Reset, which
is an address byte of 00h (0000 0000) followed by a data
byte of 06h (0000 0110). The BUF16820 acknowledges
both bytes. Upon receiving a General Call Reset, the
BUF16820 performs a full internal reset, as though it had
been powered off and then on. It always acknowledges the
General Call address byte of 00h (0000 0000), but does
not acknowledge any General Call data bytes other than
06h (0000 0110).
The BUF16820 automatically performs a reset upon
power-up. As part of the reset, the BUF16820 is configured
for all outputs to change either to the programmed OTP
memory values, or to 0000 if the OTP values have not been
programmed.
SBOS356A − FEBRUARY 2006 − REVISED OCTOBER 2006
The BUF16820 resets all outputs to the OTP memory
values (or to 0000 if the OTP values have not been
programmed) when the device address is sent, followed
by a valid DAC address with bits D7 to D5 set to ‘100’. If
these bits are set to ‘010’, only the DAC being addressed
in this most significant byte and the following least
significant byte will be reset.
OUTPUT VOLTAGE
Buffer output values are determined by the reference
voltages (VREFH and VREFL) and the decimal value of the
binary input code used to program that buffer. The value is
calculated using Equation (1):
ƪ ƫVOUT +
VREFH * VREFL
1024
Decimal Value of Code ) VREFL
(1)
The valid voltage ranges for the reference voltages are:
4V v VREFH v VS * 0.2V and 0.2V v VREFL v VS * 4V (2)
The BUF16820 outputs are capable of a full-scale voltage
output change in typically 5µs—no intermediate steps are
required.
OUTPUT LATCH
Updating the DAC register is not the same as updating the
DAC output voltage, because the BUF16820 features a
double-buffered register structure. There are three
methods for latching transferred data from the storage
registers into the DACs to update the DAC output
voltages.
Method 1 requires externally setting the latch pin (LD)
LOW, LD = LOW, which updates each DAC output
voltage whenever its corresponding register is updated.
Method 2 externally sets LD = HIGH to allow all DAC
output voltages to retain their values during data transfer
until LD = LOW, which then simultaneously updates the
output voltages of all DACs to the new register values. Use
this method to transfer a future data set in advance to
prepare for a very fast output voltage update.
Method 3 uses software control. LD is maintained HIGH,
and all DACs are updated when the master writes a ‘1’ in
bit 15 and a ‘0’ in bit 14 of any DAC register. The update
occurs after receiving the 16-bit data for the
currently-written register.
The General Call Reset or a reset upon power-up updates
the DAC regardless of the state of the latch pin.
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부품번호상세설명 및 기능제조사
BUF16820

14-Channel GAMMA VOLTAGE GENERATOR

Burr-Brown
Burr-Brown
BUF16820

14-Channel Gamma Voltage Generator with Programmable Vcom Outputs and OTP Memory (Rev. B)

Texas Instruments
Texas Instruments

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