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PDF 33889 Data sheet ( Hoja de datos )
| Número de pieza | 33889 | |
| Descripción | System Basis Chip | |
| Fabricantes | Freescale Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de 33889 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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Freescale Semiconductor
Technical Data
System Basis Chip with Low
Speed Fault Tolerant CAN
Interface
Document Number: MC33889
Rev. 12.0, 3/2007
33889
An SBC device is a monolithic IC combining many functions
repeatedly found in standard microcontroller-based systems, e.g.,
protection, diagnostics, communication, power, etc. The 33889 is an
SBC having fully protected, fixed 5.0 V low drop-out regulator, with
current limit, over-temperature pre-warning and reset.
An output drive with sense input is also provided to implement a
second 5.0 V regulator using an external PNP. The 33889 has Normal,
Standby, Stop and Sleep modes; an internally switched high-side
power supply output with two wake-up inputs; programmable timeout
or window watchdog, Interrupt, Reset, SPI input control, and a low-
speed fault tolerant CAN transceiver, compatible with CAN 2.0 A and
B protocols for module-to-module communications. The combination
is an economical solution for power management, high-speed
communication, and control in MCU-based systems.
Features
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•www.DataSheet4U.com
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•
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VDD1: 5.0 V low drop voltage regulator, current limitation,
overtemperature detection, monitoring and reset function with total
current capability 200 mA
V2: tracking function of VDD1 regulator; control circuitry for external
bipolar ballast transistor for high flexibility in choice of peripheral
voltage and current supply
Four operational modes
Low standby current consumption in Stop and Sleep modes
Built-in low speed 125 kbps fault tolerant CAN physical interface.
External high voltage wake-up input, associated with HS1 VBAT
switch
150 mA output current capability for HS1 VBAT switch allowing
drive of external switches pull-up resistors or relays
Pb-Free Packaging Designated by Suffix Code EG
SYSTEM BASIS CHIP
DW SUFFIX
EG SUFFIX (PB-FREE)
PLASTIC PACKAGE
98ASB42345B
28-PIN SOICW
ORDERING INFORMATION
Device
MC33889BDW/R2
Temperature
Range (TA)
Package
MCZ33889BEG/R2
MC33889DDW/R2
-40°C to 125°C
28 SOICW
*MCZ33889DEG/R2
*Recommended for new designs
VPWR
33889
5.0 V
VDD1
VSUP
V2
MCU
GND
RST
INT
V2CTRL
V2
HS1
Local Module Supply
CS
SCLK
MOSI
SPI
CS
SCLK
MOSI
L0
L1
Wake-Up Inputs
WDOG
Safe Circuits
MISO
MISO
RTH
TXD CANH
RXD CANL
RTL
Twisted
CAN Bus
Pair
Figure 1. 33889 Simplified Application Diagram
Freescale Semiconductor, Inc. reserves the right to change the detail specifications, as
may be required, to permit improvements in the design of its products.
© Freescale Semiconductor, Inc., 2007. All rights reserved.
1 page  
PIN CONNECTIONS
Table 2. Pin Definitions (continued)
A functional description of each pin can be found in the Functional pin description section page 24.
Pin
Pin Name
Pin
Function
Formal Name
Definition
25
MISO
Output
Master In/Slave Out
SPI data sent to the MCU by the 33889. When CSLOW is HIGH, the pin
is in the high impedance state.
26
MOSI
Input
Master Out/Slave In SPI data received by the 33889.
27 CS Input
Chip Select
The CSLOW input pin is used with the SPI bus to select the 33889. When
the CSLOW is asserted LOW, the 33889 is the selected device of the SPI
bus.
28
WDOG
Output
Watchdog
The WDOG output pin is asserted LOW if the software watchdog is not
correctly triggered.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33889
5
5 Page 
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 4. Static Electrical Characteristics (continued).
Characteristics noted under conditions - VSUP From 5.5 V to 18 V and TJ from -40°C to 125°C, unless otherwise noted. Typical
values noted reflect the approximate parameter means at TA = 25°C under nominal conditions unless otherwise noted.
Description
Symbol
Min
Typ
Max Unit
LOGIC OUTPUT PINS (MISO)
Low Level Output Voltage
IOUT = 1.5 mA
High Level Output Voltage
IOUT = -250 µA
Tri-state MISO Leakage Current
0.0 V < Vmiso < VDD
VOL
VOH
IHZ
-
VDD1-0.9
-2.0
-
-
-
1.0
-
+2.0
V
V
µA
LOGIC INPUT PINS (MOSI, SCLK, CS)
High Level Input Voltage
Low Level Input Voltage
Input Current on CS
VI = 4.0 V
VI = 1.0 V
Low Level Input Current CS
VI = 1.0 V
MOSI, SCLK Input Current
0.0 < VIN < VDD
VIH 0.7VDD1 - VDD1+0.3V
VIL
-0.3
-
0.3 VDD1
V
-100
-
-20 µA
IIH
IIL
IIL
-100
-
-20 µA
IIN -10 - 10 µA
RESET PIN (RST)
High Level Output current
0.0 < Vout < 0.7 VDD
Low Level Output Voltage (I0 = 1.5 mA)
5.5 v < VSUP < 27 V
1.0 V < VDD1
Reset pull down current
WATCHDOG PIN (WDOG)
IOH
VOL
IPDW
-350
0.0
0.0
2.3
-250
-
-
-
-150
0.9
0.9
5.0
µA
V
mA
Low Level Output Voltage (I0 = 1.5 mA)
5.5 V < VSUP < 27 V
High Level Output Voltage (I0 = -250 µA)
INTERRUPT PIN (INT)
VOL
VOH
0.0
VDD1 -0.9
-
-
0.9
VDD1
V
V
Low Level Output Voltage (I0 = 1.5 mA)
High Level Output Voltage (I0 = -250 µA)
HIGH-SIDE OUTPUT PIN (HS1)
VOL
VOH
0.0
VDD1 -0.9
-
-
0.9
VDD1
V
V
RDSON at Tj = 25°C, and IOUT -150 mA
VSUP>9V
RDSON25
-
- 2.5 Ohms
Analog Integrated Circuit Device Data
Freescale Semiconductor
33889
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet 33889.PDF ] | |
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