|
|
PDF MC33593 Data sheet ( Hoja de datos )
| Número de pieza | MC33593 | |
| Descripción | PLL Tuned UHF Receiver | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de MC33593 (archivo pdf) en la parte inferior de esta página. Total 28 Páginas | ||
|
No Preview Available !
MOTOROLA
Freescale Semiconductor, Inc.
SEMICONDUCTOR TECHNICAL
Order this document
by MC33593/D
PLL Tuned UHF Receiver
for Data Transfer Applications
ROMEO2
MC33593
• 868MHz, 902-928MHz Bands
• OOK and FSK Demodulation
• Low Current Consumption: 7mA Typ. in Run Mode
• Internal or External Strobing
• Fast Wake-Up Time (1ms)
• -105dBm RF Sensitivity (at 4.8kBd Data Rate)
• Fully Integrated VCO
• Image Cancelling Mixer
• Integrated IF Bandpass Filter at 660kHz
• IF Bandwidth: 500kHz
• ID Byte and Tone Detection
• Data Rate: 1 to 11kBd
• Manchester Coded Data Clock Recovery
• Fully Configurable by SPI Interface
• Few External Components, no RF Adjustment
www.DataSheet4U.com
Pin Connections
24 23 22 21 20 19
VCC 1
18 VCCDIG
VCC 2
17 SCLK
VCCLNA 3
16 MOSI
RFIN 4
15 MISO
GNDLNA 5
14 RESETB
GNDSUB 6
13 DMDAT
7 8 9 10 11 12
Figure 1: Simplified block diagram
Device
Table 1: Ordering Information
RF frequency/
IF filter bandwidth
Ambiant
Temperature Range
MC33593FTA
868MHz / 500kHz
-40°C to +85°C
This document contains information on a new product under development. Motorola
reserves the right to change or discontinue this product without notice.
REV 7.0
© Motorola, Inc., 2002.
For More Information On This Product,
Go to: www.freescale.com
Package
LQFP24
1 page  
Freescale SMeCm33ic59o3nductor, Inc.
COMMUNICATION PROTOCOL
MANCHESTER CODING DESCRIPTION
Manchester coding is defined as follows: data is sent during the first half-bit, complementary data is sent
during the second half-bit.
Figure 3: Manchester coding example
0 100110
Original data
Manchester coded
The signal average value is constant. This allows clock recovery from the data stream itself. In order to
achieve a correct clock recovery, Manchester coded data must have a duty cycle between:
- 48% and 52% in OOK,
- 45% and 55% in FSK.
PREAMBLE, ID, HEADER WORDS AND MESSAGE DESCRIPTION
The following description applies if the Data Manager is enabled (DME=1).
The ID word is a Manchester coded byte whose content has been previously loaded in the Configuration
Register 2. The complement of the ID word is recognized as an ID word. ID word is sent at the same data rate as
data.
A preamble is required:
- before ID,
- before Header if HE=1,
- before data if HE=0.
It enables:
- in case of OOK modulation, AGC to settle,
- in case of FSK modulation, data slicer reference voltage to settle,
- in any case, clock recovery.
Figure 4 defines the Preamble word in OOK and FSK modulation. Preamble content must be carefully defined in
order not to be decoded as an ID or Header word.
Figure 4: Preamble definition
OOK Modulation:
AGC settling time Clock recovery
ID
‘1’ NRZ > 200µs
i.e.:
2 ‘1’ NRZ at 9.6kBd,
1 ‘1’ NRZ at 4.8kBd
‘0’ Manchester
at data rate
FSK Modulation:
Data slicer reference settling time Clock recovery
ID
3 ‘1’ or ‘0’ Manchester
at data rate
‘1’ or ‘0’ Manchester
at data rate
The Header word is a 4 bit Manchester coded message ‘0110’ or its complement sent at the selected data
rate. This bit sequence and its complement must not be found in the sequence preamble and ID word.
Data must follow the Header without any delay.
Data are completed by a End-of-Message (EOM) word, consisting of 2 NRZ consecutive ones or zeroes.
Even in case of FSK modulation, the data must be completed by a EOM and not by simply stopping the RF
telegram. If the complement of the Header word is received, output data are complemented too.
© Motorola, Inc., 2002.
FMorOTMOoRrOeLIAnSfoErMmICaOtNioDnUCOTnORTShPisROPDroUdCuTSct,
Go to: www5.freescale.com
revision 7.0, 5 February 2002
5 Page 
Freescale SMeCm33ic59o3nductor, Inc.
CONFIGURATION REGISTERS
Table 4 describes the Configuration Register 1 (CR1).
Table 4: Configuration Register 1
bit 7 bit 6 bit 5 bit 4 bit 3
Bit name
R/W CF MOD SOE SR1
Reset value 1 1 0 1 0
bit 2
SR0
1
bit 1
DME
0
bit 0
HE
0
- R/W controls the 3 registers access (read or write):
0 = Write CR1, CR2 ,CR3,
1 = Read CR1, CR2, CR3.
- CF defines the Carrier Frequency as shown onTable 5.
Table 5: Carrier Frequency selection
CF Selected Frequency
0 Not allowed
1 868MHz
- MOD sets the data Modulation type:
0 = On/Off Keying (OOK) modulation,
1 = Frequency Shift Keying (FSK) modulation.
- SOE enables the Strobe Oscillator:
0 = Disabled,
1 = Enabled,
Whatever SOE value has been programmed, a high level on STROBE sets the circuit into run mode.
- SR0/SR1 define the Strobe Ratio (SR) as shown on Table 6. SR is the ratio Sleep time over Run time and
Run time=TStrobe (where TStrobe is the Strobe oscillator period).
Table 6: Strobe Ratio selection
SR1 SR0
Strobe Ratio
00
3
01
7
10
15
11
31
- DME enables the Data Manager:
0 = Disabled,
1 = Enabled.
Data are output on MOSI and the associated clock on SCLK.
- HE defines if a Header word is present (the bit HE is only active if DME=1):
0 = No header,
1 = Header.
Configuration Register 2 (CR2) defines the Identifier (ID) word content. The bits will be Manchester coded.
Table 7: Configuration Register 2
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
Bit name
ID7 ID6 ID5 ID4 ID3 ID2 ID1 ID0
Reset value 0 0 0 0 0 0 0 0
Table 8 describes the Configuration Register 3 (CR3).
Table 8: Configuration Register 3
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
Bit name
DR1 DR0 MG MS PG
-
-
-
Reset value 1 0 0 0 0 0 0 0
© Motorola, Inc., 2002.
FMorOTMOoRrOeLIAnSfoErMmICaOtNioDnUCOTnORTShPisROPDroUdCuTSct,
Go to: www11.freescale.com
revision 7.0, 5 February 2002
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet MC33593.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| MC3359 | HIGH GAIN LOW POWER FM IF | Motorola Semiconductors |
| MC33591 | PLL Tuned UHF Receiver for Data Transfer Applications | Motorola Semiconductors |
| MC33592 | PLL Tuned UHF Receiver |  Freescale Semiconductor |
| MC33593 | PLL Tuned UHF Receiver | Motorola Semiconductors |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |