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PDF EL7556D Data sheet ( Hoja de datos )

Número de pieza EL7556D
Descripción Integrated Adjustable 6 Amp Synchronous Switcher
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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No Preview Available ! EL7556D Hoja de datos, Descripción, Manual

NOT REC®OMMESNDEDaEEtaDESLF7hO5eR6e6tNEW DESIGNS
August 1, 2005
EL7556D
FN7339.1
Integrated Adjustable 6 Amp
Synchronous Switcher
The EL7556D is an adjustable synchronous DC:DC
switching regulator optimized for a 5V input and 1.0V-3.8V
output. By combining integrated NMOS power FETS with a
fused-lead package, the EL7556D can supply up to 6A
continuous output current without the use of external power
devices or discrete heat sinks, thereby minimizing design
effort and overall system cost.
On-chip resistorless current sensing is used to achieve
stable, highly efficient, current-mode control. The EL7556D
also incorporates the VCC2DET function to directly interface
with the Intel P54 and P55 microprocessors. Depending on
the state of VCC2DET, the output voltage is internally preset
to 3.5V or a user-adjustable voltage using two external
resistors. In both internal and external feedback modes the
active-high PWRGD output indicates when the regulator
output is within ±10% of the programmed voltage. An on-
board sensor monitors die temperature (OT) for over-
temperature conditions and can be connected directly to
OUTEN to provide automatic thermal shutdown. Adjustable
oscillator frequency and slope compensation allow added
www.DataSheet4U.cofmlexibility in overall system design.
The EL7556D is available in a 28-pin SO package and is
specified for operation over the full -40°C to +85°C
temperature range.
Ordering Information
PART
NUMBER
PACKAGE
TAPE &
REEL PKG. DWG. #
EL7556DCM
28-Pin SO
- MDP0027
EL7556DCM-T13
28-Pin SO
13” MDP0027
EL7556DCMZ
(See Note)
28-Pin SO
(Pb-free)
- MDP0027
EL7556DCMZ-T13
(See Note)
28-Pin SO
(Pb-free)
13” MDP0027
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
Features
• Improved temperature and voltage ranges
• 6A continuous load current
• Precision internal 1% reference
• 1.0V to 3.8V output voltage
• Internal power MOSFETs
• >90% efficiency
• Synchronous switching
• Adjustable slope compensation
• Over-temperature indicator
• Pulse-by-pulse current limiting
• Operates up to 1MHz
• 1.5% typical output accuracy
• Adjustable oscillator with sync
• Remote enable/disable
• Intel P54- and P55-compatible
• VCC2DET interface
• Internal soft-start
• Pb-free plus anneal available (RoHS compliant)
Applications
• PC motherboards
• Local high power CPU supplies
• 5V to 1.0V DC:DC conversion
• Portable electronics/instruments
• P54 and P55 regulators
• GTL+ Bus power supply
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2003, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

1 page




EL7556D pdf
Typical Performance Curves
EL7556D
Efficiency vs ILOAD (VOUT =3.5V)
VDD=VIN=5.0V (±10%)
96
94 VDD=4.5V
92
90 VDD=5V
88
86 VDD=5.5V
84
82
TA=25°C
80
0.5 1.5 2.5 3.5 4.5 5.5 6.5
IOUT (A)
Line Regulation (CSLOPE=100pF)
3.54
TA=25°C
3.53
3.52
3.51
IOUT=0.5A
3.50
3.49
3.48
3.47
IOUT=3A
IOUT=6A
3.46
4.5
5.0
VIN (V)
5.5
Line Regulation vs CSLOPE (IOUT=3A)
VDD=VIN=5.0V ±10%
0.8
TA=25°C
0.7
0.6
0.5
0.4 VOUT=3.5A
0.3 VOUT=2.5A
0.2
0.1
0.0
50
VOUT=1A
75 100 125
CSLOPE (pF)
150
175
Line Regulation vs CSLOPE
VIN=VDD=5.0V ±10%
0.8
TA=25°C
0.7
0.6
0.5
0.4 IOUT=6A
0.3
0.2 IOUT=0.5A
0.1
0.0
50
75 100 125 150 175
CSLOPE (pF)
Efficiency vs ILOAD (VDD=5.0V)
100
95 VCC=3.5V
90
VCC=2.5V
85
80
VCC=1V
75
70
0.5 1.5 2.5 3.5 4.5 5.5 6.0
IOUT(A)
Load Regulation (CSLOPE=100pF)
3.54
TA=25°C
3.53
3.52
3.51
3.50
VIN=5V
VIN=5.5V
3.49
3.48
3.47
VIN=4.5V
3.46
0.5
3.0
IOUT (A)
6.0
Load Regulation vs CSLOPE (VIN=5.0V)
IOUT=3A, +3A, -2.5A
0.6
TA=25°C
0.5
VOUT=3.5A
0.4 VOUT=2.5A
0.3
0.2
VOUT=1A
0.1
0.0
50
75 100 125 150
CSLOPE (pF)
175
Load Regulation vs CSLOPE
IOUT=3A, +3A, -2.5A
0.8
TA=25°C
0.7
0.6
0.5
0.4 VIN=4.5V
0.3
0.2 VIN=5V VIN=5.5V
0.1
0.0
50
75 100 125 150 175
CSLOPE (pF)
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EL7556D arduino
EL7556D
maintain a constant gain ratio. The recommended ratio of
COSC to CSLOPE is 1.5:1
Temperature Sensor
An internal temperature sensor continuously monitors die
temperature. In the event that die temperature exceeds the
thermal trip-point, the OT pin will output a logic 0. The upper
and lower trip points are set to 135°C and 100°C,
respectively. To enable thermal shutdown this pin should be
tied directly to OUTEN. Use of this feature is recommended
during normal operation
Power Good and Power On Reset
During power up the output regulator will be disabled until
VIN reaches a value of approximately 4.0V. Approximately
500mV of hysteresis is present to eliminate noise induced
oscillations.
Under-voltage and over-voltage conditions on the regulator
output are detected through an internal window comparator.
A logic 1 on the PWRGD output indicates that regulated
output voltage is within ±10% of the nominally programmed
output voltage. Although small, the typical values of the
PWRGD threshold will vary with changes to external
feedback (and resultant loop gain) of the system. This
dependence is shown in the typical performance curves.
Thermal Management
The EL7556D utilizes “fused lead” packaging technology in
conjunction with the system board layout to achieve a lower
thermal resistance than typically found in standard 28-pin
SO packages. By fusing (or connecting) multiple external
leads to the die substrate within the package, a very
conductive heat path to the outside of the package is
created. This conductive heat path MUST then be connected
to a heat sinking area on the PCB in order to dissipate heat
out and away from the device. The conductive paths for the
EL7556D package are the fused leads: # 7, 9, 10, 11, 12, 18,
and 19. If a sufficient amount of PCB metal area is
connected to the fused package leads, a junction-to-ambient
thermal resistance of approximately 31°C/W can be
achieved (compared to 78°C/W for a standard SO28
package). The general relationship between PCB heat-
sinking metal area and the thermal resistance for this
package is shown in the Performance Curves section of this
data sheet. It can be readily seen that the thermal resistance
for this package approaches an asymptotic value of
approximately 31°C/W without any airflow.
Additional information can be found in Application Note #8
(Measuring the Thermal Resistance of Power Surface-
Mount Packages).
If the thermal shutdown pin is connected to OUTEN the IC
will enter thermal shutdown when the maximum junction
temperature is reached. For a thermal shutdown of 135ºC
and power dissipation of 2.2W the ambient temperature is
limited to a maximum value of 67ºC (typical). The ambient
temperature range can be extended with the application of
air flow. For example, the addition of 100LFM reduces the
thermal resistance by approximately 15% and can extend
the operating ambient to 77ºC (typical). Since the thermal
performance of the IC is heavily dependent on the board
layout, the system designer should exercise care during the
design phase to ensure that the IC will operate under the
worst-case environmental conditions.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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