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93AA76B 데이터시트 PDF




Microchip Technology에서 제조한 전자 부품 93AA76B은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


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부품번호 93AA76B 기능
기능 (93AA76A/B/C) 8K Microwire Compatible Serial EEPROM
제조업체 Microchip Technology
로고 Microchip Technology 로고


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93AA76B 데이터시트, 핀배열, 회로
93AA76A/B/C, 93LC76A/B/C,
93C76A/B/C
8K Microwire Compatible Serial EEPROM
www.DataSheet4U.com
Device Selection Table
Part Number
93AA76A
93AA76B
93LC76A
93LC76B
93C76A
93C76B
93AA76C
93LC76C
93C76C
VCC Range
1.8-5.5
1.8-5-5
2.5-5.5
2.5-5.5
4.5-5.5
4.5-5.5
1.8-5.5
2.5-5.5
4.5-5.5
ORG Pin
No
No
No
No
No
No
Yes
Yes
Yes
PE Pin
No
No
No
No
No
No
Yes
Yes
Yes
Features
• Low-power CMOS technology
• ORG pin to select word size for ‘76C’ version
• 1024 x 8-bit organization ‘A’ devices (no ORG)
• 512 x 16-bit organization ‘B’ devices (no ORG)
• Program Enable pin to write-protect the entire
array (except on SOT-23 packages)
• Self-timed ERASE/WRITE cycles (including
auto-erase)
• Automatic ERAL before WRAL
• Power-on/off data protection circuitry
• Industry standard 3-wire serial I/O
• Device Status signal (READY/BUSY)
• Sequential READ function
• 1,000,000 E/W cycles
• Data retention > 200 years
• Temperature ranges supported:
- Industrial (I)
-40°C to +85°C
- Automotive (E)
-40°C to +125°C
Pin Function Table
Name
CS
CLK
DI
DO
VSS
PE
ORG
VCC
Function
Chip Select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
Program Enable
Memory Configuration
Power Supply
Word Size
8-bit
16-bit
8-bit
16-bit
8-bit
16-bit
8 or 16-bit
8 or 16-bit
8 or 16-bit
Temp Ranges
I
I
I, E
I, E
I, E
I, E
I
I, E
I, E
Packages
OT
OT
OT
OT
OT
OT
P, SN, ST, MS
P, SN, ST, MS
P, SN, ST, MS
Description
The Microchip Technology Inc. 93XX76A/B/C devices
are 8K bit, low-voltage, serial Electrically Erasable
PROMs (EEPROM). Word-selectable devices such as
the 93XX76C are dependent upon external logic
levels driving the ORG pin to set word size. For
dedicated 8-bit communication, the 93XX76A devices
are available, while the 93XX76B devices provide
dedicated 16-bit communication, available on SOT-23
devices only. A Program Enable (PE) pin allows the
user to write-protect the entire memory array.
Advanced CMOS technology makes these devices
ideal for low-power, nonvolatile memory applications.
The 93XX Series is available in standard packages
including 8-lead PDIP and SOIC, and advanced
packaging including 8-lead MSOP, 6-lead SOT-23,
and 8-lead TSSOP. Pb-free (Pure Matte Sn) finish is
also available.
Package Types (not to scale)
PDIP/SOIC
(P, SN)
SOT-23
(OT)
CS
CLK
DI
DO
1
2
3
4
8 VCC
7 PE
6 ORG
5 VSS
DO 1
VSS 2
DI 3
6 VCC
5 CS
4 CLK
TSSOP/MSOP
(ST, MS)
CS
CLK
DI
DO
1
2
3
4
8 VCC
7 PE
6 ORG
5 VSS
2004 Microchip Technology Inc.
DS21796D-page 1




93AA76B pdf, 반도체, 판매, 대치품
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C
FIGURE 1-1:
SYNCHRONOUS DATA TIMING
CS VIH
VIL
VIH
CLK
VIL
VIH
DI
VIL
TDIS
TCSS
DO VOH
(READ) VOL
DO VOH
(PROGRAM) VOL
TSV
TCKH
TDIH
TPD
Note: TSV is relative to CS.
TCKL
STATUS VALID
TPD
TCSH
TCZ
TCZ
TABLE 1-3: INSTRUCTION SET FOR X 16 ORGANIZATION (93XX76B OR 93XX76C WITH ORG = 1)
Instruction SB Opcode
Address
Data In
Data Out
Req. CLK
Cycles
READ
EWEN
ERASE
ERAL
WRITE
WRAL
EWDS
1 10 X A8 A7 A6 A5 A4 A3 A2 A1 A0 — D15 – D0
29
1 00 1 1 X X X X X X X X —
HIGH-Z
13
1 11 X A8 A7 A6 A5 A4 A3 A2 A1 A0 — (RDY/BSY) 13
1 00 1 0 X X X X X X X X — (RDY/BSY) 13
1 01 X A8 A7 A6 A5 A4 A3 A2 A1 A0 D15 – D0 (RDY/BSY) 29
1 00 0 1 X X X X X X X X D15 – D0 (RDY/BSY) 29
1 00 0 0 X X X X X X X X —
HIGH-Z
13
TABLE 1-4: INSTRUCTION SET FOR X 8 ORGANIZATION (93XX76A OR 93XX76C WITH ORG = 0)
Instruction SB Opcode
Address
Data In
Data Out
Req. CLK
Cycles
READ
EWEN
ERASE
ERAL
WRITE
WRAL
EWDS
1 10 X A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 —
D7 – D0
22
1 00 1 1 X X X X X X X X X —
HIGH-Z
14
1
11 X A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 —
(RDY/BSY)
14
1 00 1 0 X X X X X X X X X — (RDY/BSY) 14
1
01 X A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 D7 – D0 (RDY/BSY)
22
1
00 0 1 X X X X X X X X X D7 – D0 (RDY/BSY)
22
1 00 0 0 X X X X X X X X X —
HIGH-Z
14
DS21796D-page 4
2004 Microchip Technology Inc.

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93AA76B 전자부품, 판매, 대치품
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C
2.5 ERASE ALL (ERAL)
The Erase All (ERAL) instruction will erase the entire
memory array to the logical ‘1’ state. The ERAL cycle is
identical to the ERASE cycle, except for the different
opcode. The ERAL cycle is completely self-timed. The
rising edge of CLK before the last data bit initiates the
write cycle. Clocking of the CLK pin is not necessary
after the device has entered the ERAL cycle.
FIGURE 2-2:
ERAL TIMING
CS
CLK
The DO pin indicates the READY/BUSY status of the
device, if CS is brought high after a minimum of 250 ns
low (TCSL).
Note:
Issuing a Start bit and then taking CS low
will clear the READY/BUSY status from
DO.
VCC must be 4.5V for proper operation of ERAL.
TCSL
CHECK STATUS
DI
1
00
10
X •••
X
HIGH-Z
DO
TSV
BUSY
TEC
TCZ
READY
HIGH-Z
2004 Microchip Technology Inc.
DS21796D-page 7

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