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95MS18 데이터시트 PDF




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기능 NM95MS18
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95MS18 데이터시트, 핀배열, 회로
July 1998
NM95MS18
Plug & Play Front-end device for ISA-Bus Systems
(Supports Windows®-NT, UNIX® and legacy systems)
General Description
The NM95MS18 is an industry standard ISA Plug-n-Play control-
ler that also supports Non-Plug-n-Play platforms like DOS,
WIN3.1x, Windows-NT and Unix.
In additon to being completely compliant to ISA PnP Specification
(Ver 1.0a), NM95MS18 integrates a total of 4Kbit of onchip
EEPROM for both PnP Resource data as well as non-PnP
configuration data to provide a true single chip solution.
NM95MS18 supports one logical device offering a flexible choice
of DMA, Interrupt and I/O address decoding features within a
single chip. NM95MS18 is implemented using Fairchild’s Ad-
vanced CMOS process and operates on a single power supply.
Features
s Fully compliant with industry standard ISA PnP specification
(Ver. 1.0a)
s Supports Non-PnP platforms like WINDOWS-NT, UNIX,
DOS/WIN3.1x
— No configuration utilities needed
s Supports Non-PnP "legacy" mode
— Can be programmed to power-up in 31 settings
s On-chip "Write-Protected" EEPROM for:
— PnP Resource data (2Kbits)
— 31 Power-on "legacy" configurations (2Kbits)
s Two modes of operation:
— DMA Mode
— Extended Interrupt Mode (supports PC-97 requirements)
s Configurable Interrupt types:
— TTL O/P
— Open Drain O/P
s Supports Wire-AND I/O chipselects
s Fully compatible with NM95MS16
s Available in 52-Pin PLCC Package
Block Diagram
ISA BUS
RSTDRV
From Switches
NPNP
SW[0:4]
Input Sense
Logic
Test Mode
Logic
SA[0:11]
IORD
IOWR
AEN
OSC
PnP Cycle
Detection
Logic
IRQOUT[0:7]
SD[0:7]
ISADRQ[0:1]
ISADACK[0:1]
SA[0:15]
IORD
IOWR
AEN
Data
Buffer
State
Machine
Registers
EEPROM
Controller
I/F
IRQ IRQIN[0:1]
Switch Logic
DMA
Switch
Logic
DRQIN
DACKOUT
ADDRESS
DECODER
IOCS[0:2]
DS500033-1
© 1998 Fairchild Semiconductor Corporation
1
www.fairchildsemi.com




95MS18 pdf, 반도체, 판매, 대치품
Absolute Maximum Ratings (Note 1)
Ambient Storage Temperature
–65°C to +150°C
All Input or Output Voltages
with Respect to Ground
Lead Temperature
(Soldering, 10 seconds)
VCC + 1V to –0.3V
+300°C
ESD Rating
2000V min.
Operating Conditions
Ambient Operating Temperature
NM95MS18
0°C to +70°C
Positive Power Supply (VCC)
4.5V to 5.5V
Note 1: Absolute Maximum Ratings are values beyond which the device may be
damaged or have its useful life impaired. The databook specifications should be met,
without exception, to ensure that the system design is reliable over its power supply,
temperature, and output/input loading variables. Fairchild does not recommend
operation outside databook sepcifications.
DC Electrical Characteristics
Symbol
Parameter
Test Conditions
ICCA Active Power Supply Current fSCL = 100 kHz
ILI Input Leakage Current VIN = GND to VCC
ILO
Output Leakage Current
VOUT = GND to VCC
VIL Input Low Voltage
VIH Input High Voltage
VOL Output Low Voltage
IOL = 24 mA (Note 4)
IOL = 2.1 mA (Note 5)
VOH Output HIGH Voltage
IOH = -3 mA (Note 4)
IOH = -400 µA (Note 5)
Capacitance TA = +25°C, f = 1.0 MHz, VCC = 5V
Symbol
Test Conditions
CI/O (Note 3)
CIN (Note 3)
COUT (Note 3)
Input/Output Capacitance
Input Capacitance
Output Capacitance
Note 2: Typical values are for TA = 25°C and nominal supply voltage (5V).
Note 3: This parameter is periodically sampled and not 100% tested.
Note 4: These values are for ISA signals like SD[0:7], IRQx, DRQx.
Note 5: These values are for card signal like IOCS[0:2]*, DO(EEPROM)
AC Electrical characteristics
Symbol
tAEN
tAC
tRVD
tAH
tRDH
tWD
tWDH
tCSA
tCSC
tIDD
Parameter
AEN valid to command active
Address valid to command active
Active read to valid data
Address, AEN hold from inactive command
Read data hold from inactive read
Write data valid before write active
Write data hold after write inactive
Chip selects valid from address valid
Chip selects valid from command active
Propagation delay for IRQ/DRQ/DACK
Min
2.0
Limits
Typ
(Note 2)
Max
TBD
10.0
0.2 1.0
1.0
-0.1 0.8
VCC + 1.0
0.4
Units
mA
µA
µA
V
V
V
2.4 V
2.4 V
Min
VI/O = 0V
VIN = 0V
VOUT = 0V
Max
8
6
6
Units
pF
pF
pF
Min
100
88
30
22
25
5
5
5
Max
150
5
20
20
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
4 www.fairchildsemi.com

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95MS18 전자부품, 판매, 대치품
Extended Interrupt Mode (Supports PC-95/PC-97 Requirements)
Extended Interrupt Mode
ON
OFF
GND
Switch
VCC
RSTDRV
OSC
IORD*
IOWR*
AEN
SA[0:15]
SD[0:7]
IRQOUT[0:5]
NM95MS18
(Extended
Interrupt Mode)
IOCS0
IOCS1
IOCS1
10K
ISDN
Controller
IRQIN0
DS500033-7
Interface Options of NM95MS18
Plug-n-Play/Non-Plug-n-Play)
1) Plug-n-Play (PnP) Interface ("/N_PNP" = 1)
In a Plug-n-Play environment, a PnP configuration manager
(typically PnP-BIOS, Windows’95 OS or PnP utility) that resides
on the PC would read the Plug-n-Play Resource data fileand
allocate the requested resource (I/O Address space, IRQ etc).
PnP configuration is actually a defined process of updating
defined PnP Registers on a PnP controller in a defined manner.
The entire protocol and Register summary is provided in the ISA
PnP Specification (Ver 1.0a). NM95MS18 is designed to be
completely compliant with the existing ISA PnP standard and
hence provides seamless PnP support for an ISA adapter. All that
is required is to prepare the Plug-n-Play Resource data for an
applicatDuring power-up, NM95MS18 defaults to Plug-n-Play
interface if it senses logic "high" at the "N_PNP*" pin. This pin has
an internal weak pullup logic and hence can be left unconnected
for PnP interface.
2) Non-Plug-n-Play (legacy) Interface ("/N_PNP" = 0)
In a legacy interface NM95MS18 is designed to ignore the
standard PnP configuration protocol and instead self-configure to
a specific configuration. A specific configuration is selected by a
set of switch inputs SW[0:4]. All possible combinations of these 5
inputs provide 31 configurations to choose from (the 32nd configu-
ration is reserved for field programming. Refer section on "Soft-
ware Write Configuration" for more detail). It is also possible to use
fewer than five switch inputs (SW[0:3], SW[0:2], SW[0:1] or SW[0]
to have fewer legacy configurations (15, 7, 3 or 1 respectively). All
these five switch inputs have weak internal pull-up resistor allow-
ing unused switch pins to be left unconnected when necessary.
During power-up, NM95MS18 defaults to Legacy interface if it
senses logic “low” at the “N_P 'n' P*” pin. Along with “N_P 'n' P*”
pin, the state of “SW[0:4]” inputs are also sensed to determine the
particular legacy configuration that needs to be selected. Each
legacy configuration occupies 8 bytes (4 Words) of internal
memory as shown in the following figure.
Configuration #31
Configuration #3
Configuration #2
Configuration #1
Word
IOCS0 (MSB)
IOCS0 (LSB)
IOCS1 (MSB)
IOCS1 (LSB)
IOCS2 (MSB)
IRQIN1 IRQIN0
Bit[7:4]
Bit[3:0]
IOCS2 (LSB)
IRQIN1 IRQIN0
TYPE TYPE
X
DRQIN
Bit[7:6] Bit[5:4] Bit[3] Bit[2:0]
8 bytes/
configuration
DS500033-8
7 www.fairchildsemi.com

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