33972A - Multiple Switch Detection Interface

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33972A 기능

기능

Multiple Switch Detection Interface

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Advance Information

Document Number: MC33972

Rev. 9.0, 4/2007

Multiple Switch Detection

Interface with Suppressed

Wake-Up

33972

33972A

The 33972 Multiple Switch Detection Interface with Suppressed

Wake-Up is designed to detect the closing and opening of up to 22

switch contacts. The switch status, either open or closed, is transferred

to the microprocessor unit (MCU) through a serial peripheral interface

(SPI). The device also features a 22-to-1 analog multiplexer for reading

inputs as analog. The analog input signal is buffered and provided on

the AMUX output pin for the MCU to read.

The 33972 device has two modes of operation, Normal and Sleep.

Normal mode allows programming of the device and supplies switch

contacts with pullup or pulldown current as it monitors switch change

of state. The Sleep mode provides low quiescent current, which makes

the 33972 ideal for automotive and industrial products requiring low

sleep state currents.

Features

• Designed to Operate 5.5 V ≤ VPWR ≤ 26 V

• Switch Input Voltage Range -14 V to VPWR, 40 V Max

• Interfaces Directly to MPU using 3.3 V/5.0 V SPI Protocol

• Selectable Wake-Up on Change of State

• Selectable Wetting Current (16 mA or 2.0 mA)

• 8 Programmable Inputs (Switches to Battery or Ground)

• 14 Switch-to-Ground Inputs

• Typical Standby Current - VPWR = 100 µA and VDD = 20 µA

• Active Interrupt (INT) on Change-of-Switch State

• Pb-Free Packaging Designated by Suffix Code EW

MULTIPLE SWITCH

DETECTION INTERFACE

DWB SUFFIX

EW SUFFIX (Pb-FREE)

98ARH99137A

32-PIN SOICW

ORDERING INFORMATION

Device

Temperature

Range (TA)

Package

MC33972DWB/R2

MC33972EW/R2

-40°C to 125°C

32 SOICW

MCZ33972AEW/R2

VDD

VBAT

33972

SP0 VPWR

SP1

VDD

SP7

SG0

SG1

SG12

WAKE

SCLK

INT

AMUX

Power Supply

LVI

Enable

VDD Watchdog

Reset

MCU

MOSI

SCLK

MISO

INT

AN0

SG13

GND

Figure 1. 33972 Simplified Application Diagram

* This document contains certain information on a new product.

Specifications and information herein are subject to change without notice.

PIN CONNECTIONS

GND

SCLK

SP0

SP1

SP2

SP3

SG0

SG1

SG2

SG3

SG4

SG5

SG6

VPWR

32 SO

31 VDD

30 AMUX

29 INT

28 SP7

27 SP6

26 SP5

25 SP4

24 SG7

23 SG8

22 SG9

21 SG10

20 SG11

19 SG12

18 SG13

17 WAKE

Figure 3. 33972 Pin Connections

Table 2. 33972 Pin Definitions

A functional description of each pin can be found in the Functional Pin Description section beginning on page 10.

Pin Number Pin Name

Formal Name

Definition

1 GND

Ground

Ground for logic, analog, and switch to battery inputs.

SPI Slave In

SPI control data input pin from MCU to 33972.

SCLK

Serial Clock

SPI control clock input pin.

Chip Select

SPI control chip select input pin from MCU to 33972. Logic [0} allows data to be

transferred in.

5–8

25 – 28

9 – 15,

18 – 24

SP0 – 3

SP4 – 7

SG0 – 6,

SG13 – 7

VPWR

WAKE

INT

AMUX

VDD

Programmable Switches

0–7

Switch-to-Ground Inputs

0 – 13

Battery Input

Wake-Up

Interrupt

Analog Multiplex Output

Voltage Drain Supply

SPI Slave Out

Programmable switch-to-battery or switch-to-ground input pins.

Switch-to-ground input pins.

Battery supply input pin. Pin requires external reverse battery protection.

Open drain wake-up output. Designed to control a power supply enable pin.

Open-drain output to MCU. Used to indicate input switch change of state.

Analog multiplex output.

3.3/5.0 V supply. Sets SPI communication level for SO driver.

Provides digital data from 33972 to MCU.

33972

Analog Integrated Circuit Device Data

Freescale Semiconductor

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ELECTRICAL CHARACTERISTICS

STATIC ELECTRICAL CHARACTERISTICS

Table 4. Static Electrical Characteristics (continued)

Characteristics noted under conditions 3.1 V ≤ VDD ≤ 5.25 V, 8.0 V ≤ VPWR ≤ 16 V, -40°C ≤ TC ≤ 125°C, unless otherwise

noted. Where applicable, typical values reflect the parameter’s approximate average value with VPWR = 13 V, TA = 25°C.

Characteristic

Symbol Min Typ Max Unit

DIGITAL INTERFACE

Input Logic Voltage Thresholds (10)

SCLK, SI, Tri-State SO Input Current

0 V to VDD

VINLOGIC

0.8

–

2.2

ISCLK, ISI,

µA

ISO (TRI)

-10

–

CS Input Current

CS = VDD

ICS µA

-10 – 10

CS Pullup Current

CS = 0 V

ICS µA

30 – 100

SO High-State Output Voltage

ISO(HIGH) = -200 µA

VSO (HIGH)

VDD - 0.8

–

VDD

SO Low-State Output Voltage

ISO(HIGH) = 1.6 mA

Input Capacitance on SCLK, SI, Tri-State SO (11)

INT Internal Pullup Current

VSO (LOW)

CIN

–

– 0.4

– 20 pF

40 100 µA

INT Voltage

INT = Open Circuit

INT Voltage

IINT = 1.0 mA

V INT (HIGH)

V INT (LOW)

VDD - 0.5

–

0.2

VDD

0.4

WAKE Internal Pullup Current

WAKE Voltage

WAKE = Open Circuit

I WAKE(PU)

40 100 µA

VWAKE (HIGH)

4.0 4.3 5.3

WAKE Voltage

IWAKE = 1.0 mA

V WAKE(LOW)

–

0.2 0.4

WAKE Voltage

Maximum Voltage Applied to WAKE Through External Pullup

V WAKE(MAX)

–

– 40

Notes

10. Upper and lower logic threshold voltage levels apply to SI, CS, and SCLK.

11. This parameter is guaranteed by design but is not production tested.

Analog Integrated Circuit Device Data

Freescale Semiconductor

33972

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부품번호	상세설명 및 기능	제조사
33972	Multiple Switch Detection Interface	Freescale Semiconductor
33972A	Multiple Switch Detection Interface	Freescale Semiconductor