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PDF MC33982B Data sheet ( Hoja de datos )
| Número de pieza | MC33982B | |
| Descripción | Single Intelligent High-Current Self-Protected Silicon High-Side Switch | |
| Fabricantes | Freescale Semiconductor | |
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Advance Information
Document Number: MC33982
Rev. 12.0, 1/2007
Single Intelligent High-Current
Self-Protected Silicon High-Side
Switch (2.0 mΩ)
33982B
The 33982B is a self-protected silicon 2.0 mΩ high-side switch used
to replace electromechanical relays, fuses, and discrete devices in
power management applications. The 33982B is designed for harsh
environments, and it includes self-recovery features. The device is
suitable for loads with high inrush current, as well as motors and all
types of resistive and inductive loads.
HIGH-SIDE SWITCH
Programming, control, and diagnostics are implemented via the
Serial Peripheral Interface (SPI). A dedicated parallel input is available
for alternate and Pulse Width Modulation (PWM) control of the output.
SPI programmable fault trip thresholds allow the device to be adjusted
for optimal performance in the application.
The 33982B is packaged in a power-enhanced 12 x 12 nonleaded
PQFN package with exposed tabs.
Features
Bottom View
S9CP8NAAARLLS1UE0F5F21I1X:D1
16-PIN PQFN
• Single 2.0 mΩ Max High-Side Switch with Parallel Input or SPI
Control
ORDERING INFORMATION
• 6.0 V to 27 V Operating Voltage with Standby Currents < 5.0 µA
• Output Current Monitoring with Two SPI-Selectable Current
Ratios
Device
Temperature
Range (TA)
Package
• SPI Control of Overcurrent Limit, Overcurrent Fault Blanking
MC33982BPNA/R2
-40°C to 125°C 16 PQFN
Time, Output-OFF Open Load Detection, Output ON/OFF
Control, Watchdog Time-out, Slew Rates, and Fault Status
Reporting
• SPI Status Reporting of Overcurrent, Open and Shorted Loads, Overtemperature Shutdown, Undervoltage and
Overvoltage Shutdown, Fail-Safe Pin Status, and Program Status
• Enhanced -16 V Reverse Polarity VPWR Protection
VDD
VDD
I/O
I/O
SO
SCLK
MCU CS
SI
I/O
I/O
A/D
VDD
VPWR
33982B
VDD
VPWR
FS
WAKE
SI
SCLK
CS
SO
RST
IN
HS
CSNS
FSI
GND
GND
LOAD
GND
PWR GND
Figure 1. 33982B Simplified Application Diagram
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2007. All rights reserved.
1 page  
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. Maximum Ratings
All voltages are with respect to ground unless otherwise noted.
Rating
Symbol
ELECTRICAL RATINGS
Operating Voltage Range
Steady-State
VPWR
VDD Supply Voltage
Input/Output Voltage (1)
SO Output Voltage (1)
WAKE Input Clamp Current
CSNS Input Clamp Current
Output Current (2)
Output Voltage
Positive
Negative
VDD
VIN, RST, FSI,
CSNS, SI, SCLK,
CS, FS
VSO
ICL(WAKE)
ICL(CSNS)
IHS
VHS
Output Clamp Energy (3)
ESD Voltage (4)
Human Body Model (HBM)
Charge Device Model (CDM)
Corner Pins (1, 12, 15, 16)
All Other Pins (2, 11, 13, 14)
ECL
VESD1
VESD3
Value
-16 to 41
-0.3 to 5.5
-0.3 to 7.0
-0.3 to VDD+0.3
2.5
10
60
41
-15
1.5
± 2000
±750
±500
Unit
V
V
V
V
mA
mA
A
V
J
V
Analog Integrated Circuit Device Data
Freescale Semiconductor
33982
5
5 Page 
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 4. Dynamic Electrical Characteristics (continued)
Characteristics noted under conditions 4.5 V ≤ VDD ≤ 5.5 V, 6.0 V ≤ VPWR ≤ 27 V, -40°C ≤ TA ≤ 150°C unless otherwise
noted. Typical values noted reflect the approximate parameter mean at TA = 25°C under nominal conditions unless otherwise
noted.
Characteristic
Symbol Min Typ Max Unit
POWER OUTPUT TIMING (CONTINUED)
Overcurrent Low Detection Blanking Time (OCLT[1:0])
00
01
10
11
t OCL0
t OCL1
t OCL2
t OCL3
ms
108 155 202
7.0 10 13
0.8 1.2 1.6
0.08 0.15 0.25
Overcurrent High Detection Blanking Time
CS to CSNS Valid Time (22)
Output Switching Delay Time (OSD[2:0])
000
001
010
011
100
101
110
111
Watchdog Time-out (WD[1:0]) (23)
00
01
10
11
SPI INTERFACE CHARACTERISTICS
t OCH
t CNSVAL
t OSD0
t OSD1
t OSD2
t OSD3
t OSD4
t OSD5
t OSD6
t OSD7
t WDTO0
t WDTO1
t WDTO2
t WDTO3
1.0
–
–
52
105
157
210
262
315
367
434
207
1750
875
10
–
0.0
75
150
225
300
375
450
525
620
310
2500
1250
20
10
–
95
195
293
390
488
585
683
806
403
3250
1625
µs
µs
ms
ms
Recommended Frequency of SPI Operation
Required Low State Duration for RST (24)
fSPI – – 3.0 MHz
tWRST – 50 167 ns
Notes
22. Time necessary for the CSNS to be within ±5% of the targeted value.
23. Watchdog time-out delay measured from the rising edge of WAKE to RST from a sleep state condition to output turn-ON with the output
driven OFF and FSI floating. The values shown are for WDR setting of [00]. The accuracy of tWDTO is consistent for all configured
watchdog timeouts.
24. RST low duration measured with outputs enabled and going to OFF or disabled condition.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33982
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MC33982B.PDF ] | |
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