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Número de pieza | LMX9830 | |
Descripción | BluetoothTM Serial Port Module | |
Fabricantes | National Semiconductor | |
Logotipo | ||
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March 2006
LMX9830
Bluetooth™ Serial Port Module
1.0 General Description
The National Semiconductor LMX9830 Bluetooth Serial
Port module is a highly integrated Bluetooth 2.0 baseband
controller and 2.4 GHz radio, combined to form a complete
small form factor (6.1 mm x 9.1 mm x 1.2 mm) Bluetooth
node.
All hardware and firmware is included to provide a com-
plete solution from antenna through the complete lower
and upper layers of the Bluetooth stack, up to the applica-
tion including the Generic Access Profile (GAP), the Ser-
vice Discovery Application Profile (SDAP), and the Serial
Port Profile (SPP). The module includes a configurable ser-
vice database to fulfil service requests for additional pro-
files on the host. Moreover, the LMX9830 is pre-qualified
as a Bluetooth Integrated Component. Conformance test-
ing through the Bluetooth qualification program enables a
short time to market after system integration by insuring a
high probability of compliance and interoperability.
Based on National’s CompactRISC™ 16-bit processor
architecture and Digital Smart Radio technology, the
LMX9830 is optimized to handle the data and link manage-
ment processing requirements of a Bluetooth node.
The firmware supplied in the on-chip ROM memory offers a
complete Bluetooth (v2.0) stack including profiles and com-
mand interface. This firmware features point-to-point and
point-to-multipoint link management supporting data rates
up to the theoretical maximum over RFComm of 704 kbps
(Best in Class in the industry). The internal memory sup-
ports up to 7 active Bluetooth data links and one active
SCO link.
The on-chip Patch RAM provided for lowest cost and risk,
allows the flexibility of firmware upgrade.
The LMX9830 module is lead free and RoHS (Restriction
of Hazardous Substances) compliant. For more information
on those quality standards, please visit our green compli-
ance website at http://www.national.com/quality/green/
1.1 APPLICATIONS
■ Personal Digital Assistants
■ POS Terminals
■ Data Logging Systems
■ Audio Gateway applications
■ Telemedicine/Medical, Industrial and Scientific.
2.0 Functional Block Diagram
Oscillator/
Crystal
Clock
Generator
including
PLL
Link
Manager
Antenna
Radio
Baseband
Controller
UART
Transport
UART
JTAG
CompactRISC
Processor
Access
bus
SPI
Voltage
Regulator
ROM
Combined
System and
Patch RAM
CVSD
Codecs
CompactRISC is a trademark of National Semiconductor Corporation.
Bluetooth is a trademark of Bluetooth SIG, Inc. and is used under license by National Semiconductor.
Audio
Port
© 2006 National Semiconductor Corporation
TXD
RXD
RTS#
CTS#
SCL
SDA
MDODI
MWCS#
MSK
MDIDO
SCLK
SFS
STD
SRD
www.national.com
1 page 6.0 Pad Description (Continued)
Pad Name
MDODI1
OP6/SCL/MSK
OP7/SDA/MDID
O
OP3/MWCS#
OP4/PG4
OP5
SCLK
SFS
SRD
STD
XOSCEN
PG6
PG7
CTS#2
RXD
RTS#3
TXD
RDY#
TCK
TDI
TDO
TMS
VCO_OUT
VCO_IN
ANT
VCC_PLL
VCC_CORE
Pad
Location
D1
C1
D4
D3
D6
F4
F1
F2
F3
E3
A6
A7
D2
C2
B3
B1
C3
A4
B4
B5
D5
A5
F8
F9
D10
F6
C5
Table 2. Pin Description
Type
Default Layout
Description
I/O
OP6: I
SCL/MSK
: I/O
OP7: I
SDA/MDI
DO: I/O
I
OP4: I
PG4: I/O
I/O
I/O
I/O
I
O
O
I/O
I/O
I
I
O
O
O
I
I
O
I
O
I
I/O
O
O
See Table 17 on
page 17
See Table 17 on
page 17
See Table 17 on
page 17 and
Table 18 on page
19
See Table 17 on
page 17 and
Table 18 on page
19
See Table 17 on
page 17 and
Table 18 on page
19
GND (if not
used)
NC (if not used)
NC
NC
NC
NC
NC
SPI Master Out Slave In
OP6: Pin checked during Startup Sequence for con-
figuration option
SCL: ACCESS.Bus Clock
MSK: SPI Shift
OP7: Pin checked during Startup Sequence for con-
figuration option
SDA: ACCESS.Bus Serial Data
MDIDO: SPI Master In Slave Out
OP3: Pin checked during Startup Sequence for con-
figuration option
MWCS#: SPI Slave Select Input (active low)
OP4: Pin checked during Startup Sequence for con-
figuration option
PG4: GPIO
OP5: Pin checked during Startup Sequence for con-
figuration option
Audio PCM Interface Clock
Audio PCM Interface Frame Synchronization
Audio PCM Interface Receive Data Input
Audio PCM Interface Transmit Data Output
Clock Request. Toggles with X2 (LP0) crystal
enable/disable
GPIO
GPIO - Default setup RF traffic LED indication
Host Serial Port Clear To Send (active low)
Host Serial Port Receive Data
Host Serial Port Request To Send (active low)
Host Serial Port Transmit Data
JTAG Ready Output (active low)
JTAG Test Clock Input
JTAG Test Data Input
JTAG Test Data Output
JTAG Test Mode Select Input
Charge Pump Output, connect to Loop filter
VCO Tuning Input, feedback from Loop filter
RF Antenna 50 ohm Nominal Impedance
1.8V Core Logic Power Supply Output
1.8V Voltage Regulator Output
5 www.national.com
5 Page 7.0 General Specifications (Continued)
7.3 PERFORMANCE DATA (TYPICAL)
Figure 2. Modulation
Figure 4. Corresponding Eye Diagram
Figure 3. Transmit Spectrum
Figure 5. Synthesizer Phase Noise
Filter Insertion Loss
0
-2
-4
-6
-8
-10
2.1E+09
2.2E+09
2.3E+09
2.4E+09
2.5E+09
Frequency (Hz)
2.6E+09
2.7E+09
2.8E+09
Figure 6. Front-End Bandpass Filter Response
11
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11 Page |
Páginas | Total 46 Páginas | |
PDF Descargar | [ Datasheet LMX9830.PDF ] |
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