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PDF ispPAC-POWR6AT6 Data sheet ( Hoja de datos )
| Número de pieza | ispPAC-POWR6AT6 | |
| Descripción | In-System Programmable Power Supply Monitoring and Margining Controller | |
| Fabricantes | Lattice Semiconductor | |
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ispPAC-® POWR6AT6
In-System Programmable Power Supply
Monitoring and Margining Controller
April 2006
Preliminary Data Sheet
Features
Application Block Diagram
■ Power Supply Margin and Trim Functions
• Trim and margin up to six power supplies
• Dynamic voltage control through I2C
• Four hardware selectable voltage profiles
• Independent Digital Closed-Loop Trim function
for each output
■ Analog Input Monitoring
• Six analog monitor inputs
• Differential input architecture for accurate
remote ground sensing
• 10-bit ADC for direct voltage measurements
■ 2-Wire (I2C/SMBus™ Compatible) Interface
• Readout of the ADC
• Dynamic trimming/margining control
■ Other Features
• Programmable analog circuitry
• Wide supply range, 2.8V to 3.96V
• In-system programmable through JTAG
• Industrial temperature range: -40°C to +85°C
• 32-pin QFN package, only 5mm x 5mm, lead-
free option
Description
3.3V
2.5V
1.8V
POL#1
POL#2
POL#3
Vout
Trim
Vout
Trim
Vout
Trim
Vout
Trim
Vout
Trim
Vout
Trim
6 Analog
Trim Outputs
Power Supply
Margin/Trim
Control
6 Analog
Monitor Inputs
ADC
I2 C
Interface
CPU
I2C
Bus
Lattice’s Power Manager II ispPAC-POWR6AT6 is a
general-purpose power-supply monitoring and margin-
ing controller, incorporating in-system programmable
analog functions implemented in non-volatile E2CMOS®
technology. The ispPAC-POWR6AT6 device provides
six independent analog input channels to monitor up to
six power supply test points. Each of these input chan-
nels offers a differential input to support remote ground
sensing.
The ispPAC-POWR6AT6 incorporates six DACs for gen-
erating a trimming voltage to control the output voltage
of a power supply. The trimming voltage can be set to
four hardware selectable preset values (voltage profiles)
or can be dynamically loaded in to the DAC through the
I2C bus. Additionally, each power supply output voltage
can be maintained typically within 0.5% tolerance
across various load conditions using the Digital Closed
Loop Control mode. The operating voltage profile can
be selected using external hardware pins.
ispPAC-POWR6AT6
The on-chip 10-bit A/D converter can both be used to
monitor the VMON voltage through the I2C bus as well as
for implementing digital closed loop mode for maintain-
ing the output voltage of all power supplies controlled by
the monitoring and trimming section of the ispPAC-
POWR6AT6 device.
The I2C bus/SMBus interface allows an external micro-
controller to measure the voltages connected to the
VMON analog monitor inputs and load the DACs for the
generation of the trimming voltages of the external DC-
DC converters.
© 2006 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other
brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without
notice.
www.latticesemi.com
1
6at6_01.0
1 page  
Lattice Semiconductor
ispPAC-POWR6AT6 Data Sheet
Absolute Maximum Ratings
Absolute maximum ratings are shown in the table below. Stresses beyond those listed may cause permanent dam-
age to the device. Functional operation of the device at these or any other conditions beyond those indicated in the
recommended operating conditions of this specification is not implied.
Symbol
VCCD
VCCA
VCCJ
VIN
VMON+
VMONGS
TS
TA
Parameter
Core supply
Analog supply
JTAG logic supply
Digital input voltage (all digital I/O pins)
VMON input voltage
VMON input voltage ground sense
Storage temperature
Ambient temperature
Conditions
Min.
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-65
-65
Max.
4.5
4.5
6
6
6
6
150
125
Units
V
V
V
V
V
V
oC
oC
Recommended Operating Conditions
Symbol
VCCD, VCCA
VCCJ
VIN
VMON
VMONGS
VOUT
TAPROG
TA
Parameter
Core supply voltage at pin
JTAG logic supply voltage at pin
Input voltage at digital input pins
Input voltage at VMON pins
Input voltage at VMONGS pins
Open-drain output voltage
Ambient temperature during programming
Ambient temperature
Conditions
CLTLOCK/SMBA
Power applied
Min.
2.8
2.25
-0.3
-0.3
-0.3
-0.3
-40
-40
Max.
3.96
3.6
5.5
5.9
0.3
5.5
85
85
Units
V
V
V
V
V
V
oC
oC
Analog Specifications
Symbol
Parameter
ICC1 Supply current
ICCJ Supply current
1. Includes currents on VCCD and VCCA supplies.
Conditions
Min.
Typ.
Max.
10
1
Units
mA
mA
Analog Voltage Monitor Inputs (VMON)
Symbol
Parameter
RIN Input resistance
Conditions
Input mode = Attenuated1
Input mode = Unattenuated
Min.
50
Typ.
65
10
Max.
80
CIN Input capacitance
12
1. True for Vmon input voltage from 600mV to 2.048V. Values less than 600mV will see higher input impedance values.
Units
kΩ
MΩ
pF
5
5 Page 
Lattice Semiconductor
ispPAC-POWR6AT6 Data Sheet
Calculation
The algorithm to convert the ADC code to the corresponding voltage takes into consideration the attenuation bit
value. In other words, if the attenuation bit is set, then ADC output logic multiplies the 10-bit ADC code by 3 to cal-
culate the actual voltage at that VMON input. The following formula can always be used to calculate the actual volt-
age from the ADC code.
Voltage at the VMONx Pins
VMONx = ADC code (12 bits1, converted to decimal) * 2mV
1Note: ADC_VALUE_HIGH (8 bits), ADC_VALUE_LOW (4 bits) read from I2C/SMBUS interface
Controlling Power Supply Output Voltage with the Margin/ Trim Block
One of the key features of the ispPAC-POWR6AT6 is its ability to make adjustments to the power supplies that it
may also be monitoring. This is accomplished through the Trim and Margin Block of the device. The Trim and Mar-
gin Block can adjust voltages of up to six different power supplies through TrimCells as shown in Figure 7. The DC-
DC blocks in the figure represent virtually any type of DC power supply that has a trim or voltage adjustment input.
This can be an off-the-shelf unit or custom circuit designed around a switching regulator IC.
The interface between the ispPAC-POWR6AT6 and the DC power supply is represented by a single resistor (R1 to
R6) to simplify the diagram. Each of these resistors represents a resistor network.
Other control signals driving the Margin/Trim Block are:
• VPS [1:0] – Control signals from device pins common to all six TrimCells, which are used to select the active
voltage profile for all TrimCells together.
• ADC input – Used to determine the trimmed DC-DC converter voltage.
• CLTENb – Used to enable closed loop trimming of all TrimCells together.
Next to each DC-DC converter, four voltages are shown. These voltages correspond to the operating voltage profile
of the Margin/Trim Block.
When the VPS[1:0] = 00, representing Voltage Profile 0: (Voltage Profile 0 is recommended to be used for the nor-
mal circuit operation)
The output voltage of the DC-DC converter controlled by the Trim 1 pin of the ispPAC-POWR6AT6 will be 1V and
that TrimCell is operating in closed loop trim mode. At the same time, the DC-DC converters controlled by Trim 2,
Trim 3 and Trim 6 pins output 1.2V, 1.5V and 3.3V respectively.
When the VPS[1:0] = 01, representing Voltage Profile 1 being active:
The DC-DC output voltage controlled by Trim 1, 2, 3, and 6 pins will be 1.05V, 1.26V, 1.57V, and 3.46V. These sup-
ply voltages correspond to 5% above their respective normal operating voltage (also called as margin high).
Similarly, when VPS[1:0] = 11, all DC-DC converters are margined low by 5%.
11
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| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ispPAC-POWR6AT6.PDF ] | |
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