|
|
|
부품번호 | U630H16XS 기능 |
|
|
기능 | HardStore 2K x 8 nvSRAM Die | ||
제조업체 | Simtek Corporation | ||
로고 | |||
www.DataSheet4U.com
Obsolete - Not Recommended for New Designs
U630H16XS
HardStore 2K x 8 nvSRAM Die
Features
Description
• High-performance CMOS non-
volatile static RAM 2048 x 8 bits
• 25, 35 and 45 ns Access Times
• 12, 20 and 25 ns Output Enable
Access Times
• Hardware STORE Initiation
(STORE Cycle Time < 10 ms)
• Automatic STORE Timing
• 106 STORE cycles to EEPROM
• 100 years data retention in
EEPROM
• Automatic RECALL on Power Up
• Hardware RECALL Initiation
(RECALL Cycle Time < 20 μs)
• Unlimited RECALL cycles from
EEPROM
• Unlimited SRAM Read and Write
• Single 5 V ± 10 % Operation
• Operating temperature ranges:
0 to 70 °C
-40 to 85 °C
• QS 90000 Quality Standard
• ESD protection > 2000 V
(MIL STD 883C M3015.7-HBM)
The U630H16 has two separate
modes of operation: SRAM mode
and non-volatile mode, determined
by the state of the NE pad.
In SRAM mode, the memory ope-
rates as an ordinary static RAM. In
non-volatile operation, data is
transferred in parallel from SRAM
to EEPROM or from EEPROM to
SRAM. In this mode SRAM
functions are disabled.
The U630H16 is a fast static RAM
(25, 35, 45 ns), with a non-volatile
electrically erasable PROM
(EEPROM) element incorporated
in each static memory cell. The
SRAM can be read and written an
unlimited number of times, while
independent non-volatile data resi-
des in EEPROM. Data transfers
from the SRAM to the EEPROM
(the STORE operation), or from the
EEPROM to the SRAM (the
RECALL operation) are initiated
through the state of the NE pad.
The U630H16 combines the high
performance and ease of use of a
fast SRAM with non-volatile data
integrity.
Once a STORE cycle is initiated,
further input or output are disabled
until the cycle is completed.
Internally, RECALL is a two step
procedure. First, the SRAM data is
cleared and second, the non-vola-
tile information is transferred into
the SRAM cells.
The RECALL operation in no way
alters the data in the EEPROM
cells. The non-volatile data can be
recalled an unlimited number of
times.
The chips are tested with a
restricted wafer probe program
at room temperature only. Unte-
sted parameters are marked with
a number sign (#).
Pad Configuration
Pad Description
A5 A6 A7 NE VCC
VBND
W HSB A8 A9
A4 W
A3 G
A2 A10
A1 E
A0 DQ0 DQ1 DQ2 VSS VCC DQ3 DQ4 DQ5 DQ6 DQ7
Signal Name
A0 - A10
DQ0 - DQ7
E
G
W
NE
VCC
VSS
VBND
Signal Description
Address Inputs
Data In/Out
Chip Enable
Output Enable
Write Enable
Nonvolatile Enable
Power Supply Voltage
Ground
HardStore type enable
March 31, 2006
STK Control #ML0039
1
Rev 1.0
U630H16XS
DC Characteristics
Output High Voltage
Output Low Voltage
Output High Current
Output Low Current
Input Leakage Current
Output Leakage Current
High
Low
High at Three-State- Output
Low at Three-State- Output
Symbol
Conditions
VOH
VOL
IOH
IOL
IIH
IIL
IOHZ
IOLZ
VCC
IOH
IOL
VCC
VOH
VOL
VCC
VIH
VIL
VCC
VOH
VOL
= 4.5 V
=-4 mA
= 8 mA
= 4.5 V
= 2.4 V
= 0.4 V
= 5.5 V
= 5.5 V
= 0V
= 5.5 V
= 5.5 V
= 0V
Min.
2.4#
8#
-1
-1
Max.
Unit
V
0.4# V
-4# mA
mA
1 μA
μA
1 μA
μA
SRAM Memory Operations
No.
Switching Characteristics
Read Cycle
Symbol
Alt. IEC
1 Read Cycle Timef
2 Address Access Time to Data Validg
3 Chip Enable Access Time to Data Valid
4 Output Enable Access Time to Data Valid
5 E HIGH to Output in High-Zh
6 G HIGH to Output in High-Zh
7 E LOW to Output in Low-Z
8 G LOW to Output in Low-Z
9 Output Hold Time after Addr. Changeg
10 Chip Enable to Power Activee
11 Chip Disable to Power Standbyd, e
tAVAV
tAVQV
tELQV
tGLQV
tEHQZ
tGHQZ
tELQX
tGLQX
tAXQX
tELICCH
tEHICCL
tcR
ta(A)
ta(E)
ta(G)
tdis(E)
tdis(G)
ten(E)
ten(G)
tv(A)
tPU
tPD
25 35 45
Unit
Min. Max. Min. Max. Min. Max.
25# 35# 45#
ns
25# 35 45# ns
25# 35 45# ns
12# 20# 25# ns
13# 17# 20# ns
13# 17# 20# ns
5# 5# 5#
ns
0# 0# 0#
3# 3# 3#
0# 0# 0#
ns
ns
ns
25# 35# 45# ns
e: Parameter guaranteed but not tested.
f: Device is continuously selected with E and G both LOW.
g: Address valid prior to or coincident with E transition LOW.
h: Measured ± 200 mV from steady state output voltage.
STK Control #ML0039
4
Rev 1.0
March 31, 2006
4페이지 Nonvolatile Memory Operations
No.
STORE Cycle Inhibit and
Automatic Power Up RECALL
Symbol
Alt. IEC
24 Power Up RECALL Durationk, e
Low Voltage Trigger Level
tRESTORE
VSWITCH
k: tRESTORE starts from the time VCC rises above VSWITCH.
STORE Cycle Inhibit and Automatic Power Up RECALL
VCC
5.0 V
VSWITCH
Min.
4.0
U630H16XS
Max.
650
4.5
Unit
μs
V
Power Up
RECALL
(24)
tRESTORE
t
STORE inhibit
Mode Selection
E W G NE
Mode
Power
Notes
L
H
L
L Nonvolatile RECALL Active
l
L
L
H
L Nonvolatile STORE
ICC2
L
L
L
H
L
H
L No operation Active
*
* H or L
l: An automatic RECALL also takes place at power up, starting when VCC exceeds VSWITCH and takes tRESTORE. VCC must not drop below
VSWITCH once it has been exceeded for the RECALL to function properly.
March 31, 2006
STK Control #ML0039
7
Rev 1.0
7페이지 | |||
구 성 | 총 16 페이지수 | ||
다운로드 | [ U630H16XS.PDF 데이터시트 ] |
당사 플랫폼은 키워드, 제품 이름 또는 부품 번호를 사용하여 검색할 수 있는 |
구매 문의 | 일반 IC 문의 : 샘플 및 소량 구매 ----------------------------------------------------------------------- IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한 광범위한 전력 반도체를 판매합니다. 전력 반도체 전문업체 상호 : 아이지 인터내셔날 사이트 방문 : [ 홈페이지 ] [ 블로그 1 ] [ 블로그 2 ] |
부품번호 | 상세설명 및 기능 | 제조사 |
U630H16XS | HardStore 2K x 8 nvSRAM Die | Simtek Corporation |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |