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PDF CS4383 Data sheet ( Hoja de datos )

Número de pieza CS4383
Descripción 192 kHz 8-Channel D/A Converter
Fabricantes Cirrus Logic 
Logotipo Cirrus Logic Logotipo



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CS4383
114 dB, 192 kHz 8-Channel D/A Converter
Features
24-Bit Conversion
Up to 192 kHz Sample Rates
114 dB Dynamic Range
-100 dB THD+N
Supports PCM and DSD Data Formats
Selectable Digital Filters
Volume Control with Soft Ramp
– 1 dB Step Size
– Zero Crossing Click-Free Transitions
Dedicated DSD inputs
Low Clock Jitter Sensitivity
µC or Stand-Alone Operation
3 Mute Control pins for Left, Right, and
Surrounds
I
Description
The CS4383 is a complete 8-channel digital-to-analog
system including digital interpolation, fifth-order delta-
sigma digital-to-analog conversion, digital de-emphasis,
volume control and analog filtering. The advantages of
this architecture include: ideal differential linearity, no
distortion mechanisms due to resistor matching errors,
no linearity drift over time and temperature and a high
tolerance to clock jitter.
The CS4383 accepts PCM data at sample rates from
4 kHz to 192 kHz, DSD audio data, and operates over a
wide power supply range. These features are ideal for
multi-channel audio systems including DVD players,
SACD players, A/V receivers, digital TV’s and VCR’s,
mixing consoles, effects processors, set-top boxes, and
automotive audio systems.
ORDERING INFORMATION
CS4383-KQ -10 to 70 °C
CS4383-BQ -40 to 85 °C
CDB4383
48-pin LQFP
48-pin LQFP
Evaluation Board
D S D _S C L K(M 3 )
S C L/C C LK (M 1) S D A /C D IN (M 2) A D 0/C S (M 0) VLC
MUTEC1 MUTEC2 M UTEC3
RST
VLS
S C LK
LRC K
SD I N1
SD I N2
SD I N3
SD I N4
M C LK
÷2
8
DSDxx
C o ntro l P ort(S ta nd -A lo ne M o de S e le ct)
V olu m e C o ntro l
M ixer
V olu m e C ontro l
V olu m e C o ntro l
M ixer
V olu m e C ontro l
V olu m e C o ntro l
M ixer
V olu m e C ontro l
V olu m e C o ntro l
M ixer
V olu m e C ontro l
I n t e r p o la ti o n F ilt e r
I n t e r p o la t i o n F i lt e r
In t e r p o la ti o n F ilt e r
I n t e r p o la t i o n F i lt e r
In t e r p o la ti o n F ilt e r
I n t e r p o la t i o n F i lt e r
In t e r p o la ti o n F ilt e r
I n t e r p o la t i o n F i lt e r
E xte rn a l
M ute C o ntrol
∆Σ D A C
A n alo g F ilte r
∆Σ D A C
∆Σ D A C
A n a lo g F ilt e r
A n alo g F ilte r
∆Σ D AC
∆Σ D A C
A n a lo g F ilt e r
A n alo g F ilte r
∆Σ D AC
∆Σ D A C
∆Σ D AC
A n a lo g F ilt e r
A n alo g F ilte r
A n a lo g F ilt e r
VD
GND
GND
VA
A O U T A1+
A O U T A1-
A O U T B1+
A O U T B1-
A O U T A2+
A O U T A2-
A O U T B2+
A O U T B2-
A O U T A3+
A O U T A3-
A O U T B3+
A O U T B3-
A O U T A4+
A O U T A4-
A O U T B4+
A O U T B4-
VQ
F IL T +
Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.cirrus.com
©Copyright Cirrus Logic, Inc. 2002
(All Rights Reserved)
MAR ‘02
DS548PP2
1

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CS4383 pdf
CS4383
ANALOG CHARACTERISTICS (Continued)
Parameters
Analog Output - All PCM modes and DSD
Full Scale Differential Output Voltage (Note 5)
Quiescent Voltage
Max Current from VQ
Interchannel Gain Mismatch
Gain Drift
Output Impedance
(Note 5)
AC-Load Resistance
Load Capacitance
Symbol
VFS
VQ
IQMAX
ZOUT
RL
CL
Min
88% VA
-
-
-
-
-
3
-
Typ
92% VA
50% VA
1
0.1
100
100
-
-
Max
Units
94% VA
-
-
-
-
-
-
100
Vpp
VDC
µA
dB
ppm/°C
k
pF
POWER AND THERMAL CHARACTERISTICS
Parameters
Symbol Min Typ Max Units
Power Supplies
Power Supply Current
normal operation, VA= 5V
(Note 6)
VD= 5V
VD= 3.3V
Interface current, VLC=5V (Note 7, 8)
VLS=5V
power-down state (all supplies) (Note 9)
IA
ID
ID
ILC
ILS
Ipd
- 60 66 mA
- 45 70 mA
- 30 46 mA
- 2 - µA
- 84 -
µA
- 200 -
µA
Power Dissipation
VA = 5 V, VD = 3.3 V
VA = 5 V, VD = 5 V
(Note 6)
normal operation
power-down (Note 9)
normal operation
power-down (Note 9)
-
400 485
mW
- 1 - mW
-
525 680
mW
- 1 - mW
Package Thermal Resistance
Power Supply Rejection Ratio (Note 10)
θJA - 48 - °C/Watt
θJC - 15 - °C/Watt
(1 kHz) PSRR
-
60
-
dB
(60 Hz)
- 40 -
dB
Notes: 5. VFS is tested under load RL and includes attenuation due to ZOUT
6. Current consumption increases with increasing FS within a given speed mode and is signal dependant.
Max values are based on highest FS and highest MCLK.
7. ILC measured with no external loading on the SDA pin.
8. This specification is violated when the VLC supply is greater than VD and when pin 16 (M1/SDA) is tied
or pulled low. Logic tied to pin 16 needs to be able to sink this current.
9. Power down mode is defined as RST pin = Low with all clock and data lines held static.
10. Valid with the recommended capacitor values on FILT+ and VQ as shown in Figures 5 and 6.
5

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CS4383 arduino
CS4383
SWITCHING CHARACTERISTICS - CONTROL PORT - SPI FORMAT
(For KQ TA = -10 to +70 °C; For BQ TA = -40 to +85 °C; VLC = 1.8 V to 5.5 V; Inputs: Logic 0 = GND, Logic 1 = VLC,
CL = 30 pF)
Parameter
CCLK Clock Frequency
Symbol
fsclk
Min
-
Max
M------C----L----K---
2
Unit
MHz
RST Rising Edge to CS Falling
CCLK Edge to CS Falling
CS High Time Between Transmissions
CS Falling to CCLK Edge
CCLK Low Time
(Note 20)
tsrs
tspi
tcsh
tcss
tscl
500
500
1.0
20
--------1---------
MCLK
- ns
- ns
- µs
- ns
- ns
CCLK High Time
tsch --------1---------
MCLK
- ns
CDIN to CCLK Rising Setup Time
CCLK Rising to DATA Hold Time
Rise Time of CCLK and CDIN
Fall Time of CCLK and CDIN
(Note 21)
(Note 22)
(Note 22)
tdsu
tdh
tr2
tf2
40
15
-
-
- ns
- ns
100 ns
100 ns
Notes: 22. tspi only needed before first falling edge of CS after RST rising edge. tspi = 0 at all other times.
23. Data must be held for sufficient time to bridge the transition time of CCLK.
24. For FSCK < 1 MHz.
RST t srs
CS
CCLK
C D IN
t spi t css
t r2
t scl t sch
t f2
t dsu t dh
Figure 4. Control Port Timing - SPI Format
t csh
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