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PDF CS4412A Data sheet ( Hoja de datos )
| Número de pieza | CS4412A | |
| Descripción | Quad Half-Bridge Digital Amplifier Power Stage | |
| Fabricantes | Cirrus Logic | |
| Logotipo |  |
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CS4412A
30 W Quad Half-Bridge Digital Amplifier Power Stage
Features
Configurable Outputs (10% THD+N)
– 2 x 15 W into 8 Ω, Full-Bridge
– 1 x 30 W into 4 Ω, Parallel Full-Bridge
– 4 x 7 W into 4 Ω, Half-Bridge
– 2 x 7 W into 4 Ω, Half-Bridge + 1 x 15 W
into 8 Ω, Full-Bridge
Space-Efficient Thermally-Enhanced QFN
– No External Heat Sink Required
> 100 dB Dynamic Range - System Level
< 0.1% THD+N @ 1 W - System Level
Built-In Protection with Error Reporting
– Over-Current
– Thermal Warning and Overload
– Under-Voltage
+8 V to +18 V High Voltage Supply
PWM Popguard® for Quiet Startup
No Bootstrap Required
Low Quiescent Current
Low Power Standby Mode
Common Applications
Integrated Digital Televisions
Portable Media Player Docking Stations
Mini/Micro Shelf Systems
Powered Desktop Speakers
General Description
The CS4412A is a high-efficiency power stage for digital
Class-D amplifiers designed to input PWM signals from
a modulator such as the CS4525. The power stage out-
puts can be configured as four half-bridge channels, two
half-bridge channels and one full-bridge channel, two
full-bridge channels, or one parallel full-bridge channel.
The CS4412A integrates on-chip over-current, under-
voltage, over-temperature protection and error report-
ing as well as a thermal warning indicator. The low
RDS(ON) outputs can source up to 2.5 A peak current,
delivering high efficiency which allows small device
package and lower power supplies.
The CS4412A is available in a 48-pin QFN package in
Commercial grade (-10 to +70° C). The CRD4412A cus-
tomer reference design is also available. Please refer to
“Ordering Information” on page 24 for complete order-
ing information.
In 1
In 2
In 3
In 4
Reset
Hardware
Configuration
2.5 V to 5 V
Mode
Configuration
Control Logic
Non-Overlap
Time Insertion
Non-Overlap
Time Insertion
Non-Overlap
Time Insertion
Gate
Drive
Gate
Drive
Gate
Drive
8 V to 18 V
VP
Amplifier
Out 1
Amplifier
Out 2
Amplifier
Out 3
Current &
Thermal Data
Protection &
Error Reporting
Non-Overlap
Time Insertion
Gate
Drive
Amplifier
Out 4
PGND
Advance Product Information
http://www.cirrus.com
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Copyright © Cirrus Logic, Inc. 2007
(All Rights Reserved)
MAY '07
DS786A1
1 page  
2. CHARACTERISTICS AND SPECIFICATIONS
CS4412A
RECOMMENDED OPERATING CONDITIONS
GND = PGND = 0 V, all voltages with respect to ground.
DC Power Supply
Digital Core
Parameters
Power Stage
Temperature
Ambient Temperature
Junction Temperature
Symbol
VD
VD
VD
VP
Commercial
TA
TJ
Min
2.375
3.135
4.75
8.0
-10
-10
Nom
2.5
3.3
5.0
-
-
Max
2.625
3.465
5.25
18.0
+70
+125
Units
V
V
V
V
°C
°C
ABSOLUTE MAXIMUM RATINGS
GND = PGND = 0 V; all voltages with respect to ground.
Parameters
DC Power Supply
Power Stage
Power Stage
Digital Core
Outputs Switching and Under Load
No Output Switching
Inputs
Input Current
(Note 1)
Digital Input Voltage
(Note 2)
Temperature
Ambient Operating Temperature - Power Applied
Commercial
Storage Temperature
Symbol
VP
VP
VD
Iin
VIND
TA
Tstg
Min
-0.3
-0.3
-0.3
-
-0.3
-20
-65
Max
19.8
23.0
6.0
±10
VD + 0.4
Units
V
V
V
mA
V
+85
+150
°C
°C
WARNING: Operation beyond these limits may result in permanent damage to the device. Normal operation is not
guaranteed at these extremes.
Notes: 1. Any pin except supplies. Transient currents of up to ±100 mA on the PWM input pins will not cause
SCR latch-up.
2. The maximum over/under voltage is limited by the input current.
DS786A1
5
5 Page 
CS4412A
+3.3 V or +5.0 V
10 µF 0.1 µF
12
470 µF 0.1 µF
0.1 µF
0.1 µF
0.1 µF 470 µF
+8 V to +18 V
25 30 31 36
33 nF
Ch1_PWM
Ch2_PWM
Ch3_PWM
Ch4_PWM
4 IN1
5 IN2
6 IN3
7 IN4
VD
Connect LVD to :
VD if VD = 5 V
GND if VD = 3.3 V
See Section 5.1.1
for details.
VD
1 CNFG0
2 CNFG1
3 CNFG2
9 LVD
45 RAMP
System
Control
Logic
43 ERROC12
44 ERROC34
42 ERRUVTE
41 TWR
8 RST12
46 RST34
10 µF 0.1 µF
11 VD_REG
CS4412A
16.2 k Ω
21 OCREF
Thermal Pad
RAMP_CAP 24
OUT1 35
Half-Bridge
Output Filter
See Figure 5.
OUT2 32
Half-Bridge
Output Filter
See Figure 5.
OUT3 29
Half-Bridge
Output Filter
See Figure 5.
OUT4 26
GND 10
GND 13
GND 14
GND 15
GND 16
GND 17
GND 18
GND 19
GND 20
GND 47
GND 48
Half-Bridge
Output Filter
See Figure 5.
22 23 27 28 33 34 37 38 39 40
DS786A1
Figure 3. 4 Channel Half-Bridge Typical Connection Diagram
Channel 1
Audio
Output
Channel 2
Audio
Output
Channel 3
Audio
Output
Channel 4
Audio
Output
11
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet CS4412A.PDF ] | |
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