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Número de pieza | BU2370FV | |
Descripción | VCO phase comparator | |
Fabricantes | ROHM Semiconductor | |
Logotipo | ||
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Multimedia ICs
VCO + phase comparator for TV
BU2370FV
BU2370FV
BU2370FV is a VCO+phase comparator IC used to construct PLL system. Adopting external LPF and divider can
generate the PLL system and low jitter clocks. Output can be switched into half.
zApplications
TV
zFeatures
1) VCO can oscillate output (20MHz to 60MHz)
2) High-speed edge trigger type phase comparator
3) Can control VCO, and phase comparator
independently
4) 3.3V signal power supply
5) Small SSOP-B14 package
zExternal dimensions (Unit : mm)
5.0 ± 0.2
14 8
17
0.15 ± 0.1
0.65
0.1
0.22 ± 0.1
SSOP-B14
zAbsolute maximum ratings (Ta=25°C)
Parameter
Symbol
Limits
Power supply voltalge
Inpuit voltage
Operating temperature range
VDD
VIN
Tstg
−0.5 to +7.0
−0.5 to VDD+0.5
−30 to +125
Power dissipation
Pd 350
∗An operation is not guranteed.
∗Derating : 3.5mW/°C for operation above Ta=25°C.
∗Radiation resistance design is not used.
∗Power dissipation is measured when BU2370FV is placed on the board.
Unit
V
V
°C
mW
zRecommended operating conditions
Parameter
Symbol
Min.
Typ.
Max. Unit
Power supply voltage
VDD 3.15
−
3.45
V
Input H voltage range
VIH 0.8VDD
−
VDD V
Input L voltage range
VIL 0
−
0.2VDD
V
Operating temperature
Topr
−20
−
70 °C
Output load
CL − − 15 pF
1/5
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Multimedia ICs
BU2370FV
zElectrical characteristics (Unless otherwise noted,Ta=25°C, VCC=3.3V)
Parameter
Symbol Min.
Typ. Max. Unit
Conditions
Operating current consumption IDD − 20 − mA 60MHz oscillation when output loaded
VCO
Input control voltage range (Pin 6)
VID
1
−
3V
Input H voltage (Pin 6)
IIH −0.1
0
0.1 µA Inflow current when VDD applied to input
Input L voltage (Pin 6)
IIL −0.1
0
0.1 µA Outflow current when GND applied to input
Max.oscillation frequency 1
FMAX1
30
−
− MHz FSEL=L
Max.oscillation frequency 2
FMAX2
60
−
− MHz FSEL=H
Min.oscillation frequency 1
FMIN1
−
− 15 MHz FSEL=L
Min.oscillation frequency 2
FMIN2
−
− 30 MHz FSEL=H
Frequency sensitivity 1
β1 − 15 − MHz/V FSEL=L
Frequency sensitivity 2
β2 − 30 − MHz/V FSEL=H
Output duty
Duty
45
50
55 % at 1/2 VDD
Rise-time
tr − 2.5 − nsec Time is from VDD 0.2 to VDD 0.8
Fall-time
tf − 2.5 − nsec Time is from VDD 0.2 to VDD 0.8
zApplication example
OUT VDD
OUT GND
1 OUT VDD
bypass
capacitor
2 OUT GND
1/N 3 VCO OUT
VCO VDD
VCO GND
AVDD
AGND
4 VCO VDD
bypass
capacitor
5 VCO GND
6 VCO IN
FIN-B 14
FIN-A 13
REF IN
VCOE 12
DVDD 11
DGND 10
H:VCO out Disable(L Fix)
L:VCO out Enable
DVDD
bypass
capacitor
DGND
PD OUT 9
DGND
7 FSEL1
PDE 8
H:PD Disable(Hi lmp)
L:PD Enable
DVDD
This line is noise source. But if power line
and GND are divided into two, this line
becoms AVDD,AGND
Please take care this Power line. Because this line is most weak
indigitalnoise. So this line must be separated from digital_VDD,
GND. And place bypass capacitor (0.01µF) for power pin as close
to BU2370FV as possible.
DVDD,DGND
OUT DVDD,OUT GND
And place bypass capacitor (0.01µF) for power pin as close to
BU2370FV as possible.
This line is most noise source. So it should be separated from Analog.
And this line should be connected VDD of external VCC-outdivide.
And place bypass capacitor (0.01µF) for power pin as close to
BU2370FV as possible.
∗Recommend to use capacitor that is better to reduce high frequency noise.
∗Recommend to control (FSEL1, PDE, VCOE) by power line.(DVDD, DGND)
5/5
5 Page |
Páginas | Total 6 Páginas | |
PDF Descargar | [ Datasheet BU2370FV.PDF ] |
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