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PDF PM75B6LA060 Data sheet ( Hoja de datos )
| Número de pieza | PM75B6LA060 | |
| Descripción | FLAT-BASE TYPE INSULATED PACKAGE | |
| Fabricantes | Mitsubishi Electric | |
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PM75B6LA060
APPLICATION
Photo voltaic power conditioner
PACKAGE OUTLINES
MITSUBISHI <INTELLIGENT POWER MODULES>
PM75B6LA060
FLAT-BASE TYPE
INSULATED PACKAGE
FEATURE
a) Adopting new 5th generation IGBT (CSTBTTM) chip, which
performance is improved by 1µm fine rule process.
For example, typical Vce(sat)=1.55V @Tj=125°C
b) Over-temperature protection by detecting Tj of the CSTBTTM
chips and error output is possible from all each conserva-
tion upper and lower arm of IPM.
c) New small package
Reduce the package size by 10%, thickness by 22% from
S-DASH series.
• 2φ 75A, 600V Current-sense IGBT type inverter
• 75A, 600V Current-sense Chopper IGBT
• Monolithic gate drive & protection logic
• Detection, protection & status indication circuits for, short-
circuit, over-temperature & under-voltage (P-Fo available
from upper arm devices)
• UL Recognized Yellow Card No.E80276(N)
File No.E80271
Dimensions in mm
11
7
(19.75)
19.75 3.25 16
3-2
120
106
16 16
3-2 3-2
15.25
6-2
2-φ5.5
MOUNTING HOLES
16
3
1 5 9 13 19
6-M5 NUTS
B
10.75
32.75
U VW
23 23
19-■0.5
12
23
22
+
–
1
0.5
Terminal code
1. VUPC
2. UFO
3. UP
4. VUP1
5. VVPC
6. VFO
7. VP
8. VVP1
9. NC
10. NC
11. NC
12. NC
13. VNC
14. VN1
15. Br
16. UN
17. VN
18. WN
19. Fo
Oct. 2005
1 page  
MITSUBISHI <INTELLIGENT POWER MODULES>
PM75B6LA060
FLAT-BASE TYPE
INSULATED PACKAGE
PRECAUTIONS FOR TESTING
1. Before appling any control supply voltage (VD), the input terminals should be pulled up by resistores, etc. to their corre-
sponding supply voltage and each input signal should be kept off state.
After this, the specified ON and OFF level setting for each input signal should be done.
2. When performing “SC” tests, the turn-off surge voltage spike at the corresponding protection operation should not be al-
lowed to rise above VCES rating of the device.
(These test should not be done by using a curve tracer or its equivalent.)
P, (U,V,W,B)
P, (U,V,W,B)
VCIN
(0V)
IN
Fo
V Ic
VCIN
(15V)
IN
Fo
V –Ic
VD (all) U,V, (N)
Fig. 1 VCE(sat) Test
VD (all) U,V,W,B, (N)
Fig. 2 VEC, (VFM) Test
a) Lower Arm Switching
VCIN
(15V)
Signal input
(Upper Arm)
Fo
Signal input Fo
VCIN (Lower Arm)
P
U,V,W,B
CS
Vcc
trr
Irr
90%
Ic
VCE
90%
b) Upper Arm Switching VD (all)
Fo
VCIN Signal input
(Upper Arm)
VCIN
(15V)
Signal input
(Lower Arm)
Fo
VD (all)
N
Ic
P
10%
10%
tc(on)
10%
tc(off)
VCIN
U,V
CS Vcc td(on)
tr
td(off)
10%
tf
N
Ic
(ton= td(on) + tr)
(toff= td(off) + tf)
Fig. 3 Switching Time and SC Test Circuit
Fig. 4 Switching Time Test Waveform
VCIN
(15V)
P, (U,V,W,B)
A
IN
Fo Pulse VCE
U,V,W,B, (N)
VD (all)
Fig. 5 ICES Test
VCIN
Ic
Short Circuit Current
Constant Current
SC Trip
Fo
toff(SC)
Fig. 6 SC Test Waveform
IPM’ input signal VCIN
(Upper Arm)
0V
IPM’ input signal VCIN
(Lower Arm)
0V
1.5V
2V
tdead
2V
1.5V
tdead
1.5V
2V
tdead
t
t
1.5V: Input on threshold voltage Vth(on) typical value, 2V: Input off threshold voltage Vth(off) typical value
Fig. 7 Dead Time Measurement Point Example
Oct. 2005
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet PM75B6LA060.PDF ] | |
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