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EM2710 데이터시트 PDF




eMPIA에서 제조한 전자 부품 EM2710은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 EM2710 기능
기능 USB PC Cam Device
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EM2710 데이터시트, 핀배열, 회로
www.DataSheet4U.com
EM2710
USB PC CAM Device
eMPIA Technology
Hardware Specification
EMPIA Technology Proprietary and Confidential
1
2/01/2004




EM2710 pdf, 반도체, 판매, 대치품
www.DataSheet4U.com
EM2710
ADVANCED INFORMATION
Power-down control to front-end video/audio devices
8 General-Purposed I/O ports
Snap shot button input
LED control output
0.25 micron, 2.5V Core, 3.3V I/O CMOS process
64-pin LQFP package
EMPIA Technology Proprietary and Confidential
4
2/1/2004

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EM2710 전자부품, 판매, 대치품
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EM2710
ADVANCED INFORMATION
After the above operations, the compressed video is stored into the Stream Buffer.
Audio Interface
The Audio Interface Block contains an AC97 controller. Enabled by configuration settings in EEPROM or
CFG3.
The AC97 controller interfaces with an external AC97 codec via 4-wire AC97-link. Supported audio sample
rates are 48K, 44.1K, 32K, 22.05K, and 8K.
The Audio Interface Block converts the serial audio input to PCM16 format and stores into the Stream Buffer.
Stream Buffer
The Stream Buffer stores the final audio and video data and delivers the data to the SIE upon request. The
Stream Buffer is designed to sustain 24 MB/sec iso-chronous video transfer and 0.2 MB/sec iso-chronous audio
transfer.
Serial Interface Engine
The Serial Interface Engine can be divided into 2 sub-blocks: the SIE Controller on the front end and the
Endpoint Logic on the back end. The SIE Controller manages USB packets and transactions. The Endpoint
Logic implements endpoint specific logic required for video capture application. The SIE communicates with
the USB 2.0 PHY via UTMI bus.
The UVCD complies with USB power management standard. When the USB bus stays idle for 3 mini seconds,
the chip enters suspend mode and shuts down all internal clocks. The chip also sends out a power-down signal
to external devices.
USB 2.0 PHY
The USB 2.0 PHY includes 12-MHz Full-Speed transceivers, 480-MHz High-Speed transceivers, a PLL, and an
UTMI controller. The transceivers are compliant to the USB 2.0 electrical specification. The PLL supplies
clocks to the entire chip. The UTMI controller communicates with the SIE. The PHY has been optimized for
low power. Furthermore, the PHY can be suspended by the SIE to conserve power.
Serial Port and General I/O Port
The UVCD uses a two-wire serial bus to communicate with CMOS sensor or NTSC decoder. The serial port
consists of SCL (clock) and SDA (data). Both are open-collector bi-directional ports. External pull-up resistors
are required on both lines.
There are 8 general I/O ports. All general I/O ports are open-collector bi-directional pins. If a port is intended
for output, it must be tied to external pull-up resistors.
EMPIA Technology Proprietary and Confidential
7
2/1/2004

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부품번호상세설명 및 기능제조사
EM2710

USB PC Cam Device

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